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author | Ward Vandewege <ward@gnu.org> | 2009-04-11 18:09:03 +0000 |
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committer | Ward Vandewege <ward@gnu.org> | 2009-04-11 18:09:03 +0000 |
commit | a3ec56c17a3a8853132d621ee533db2834544a3e (patch) | |
tree | f5b967e497202e10a78def497c94d0bd8e7b4e20 | |
parent | ebdc7c7cfebc14d503ab383e1493aa9fd10bd7e8 (diff) |
This patch fixes an edge case for K8 raminit. Specifically, it brings the code
in line with the K10 code.
I was trying to use DDR2 800 (CL6) memory on an m57sli, but booting failed.
Marc Jones found this bug (thanks!), which fixes booting with this specific
memory. For the record, it was Crucial CT2KIT25664AA800.
I put the machine through a few days of use. It also succesfully passed a run
of http://people.redhat.com/dledford/memtest.shtml:
$ ./memtest
TEST_DIR: /tmp
SOURCE_FILE: linux-2.6.29.1.tar.bz2
NR_PASSES: 20
MEGS_PER_COPY: 270
NR_COPIES: 45
PARALLEL: no
COMPRESS_RATIO: 5
COMPRESS_FLAG: j
COMPRESS_PROG: /bin/bzip2
EXTRACT: yes
Creating comparison source...done.
Starting test pass #1: unpacking, comparing, removing, done.
Starting test pass #2: unpacking, comparing, removing, done.
Starting test pass #3: unpacking, comparing, removing, done.
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Starting test pass #19: unpacking, comparing, removing, done.
Starting test pass #20: unpacking, comparing, removing, done.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/northbridge/amd/amdk8/raminit_f.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c index 3a316ceffe..2a9cc43c29 100644 --- a/src/northbridge/amd/amdk8/raminit_f.c +++ b/src/northbridge/amd/amdk8/raminit_f.c @@ -2071,7 +2071,8 @@ static int update_dimm_TT_1_4(const struct mem_controller *ctrl, const struct me } if (clocks > TT_MAX) { - return 0; + printk_info("warning spd byte : %x = %x > TT_MAX: %x, setting TT_MAX", SPD_TT, value, TT_MAX); + clocks = TT_MAX; } dtl = pci_read_config32(ctrl->f2, TT_REG); |