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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-15 08:45:00 +0200
committerPatrick Georgi <pgeorgi@google.com>2017-03-15 14:11:50 +0100
commit7f3741840c68679db36d359c9c96dad48af63536 (patch)
tree7eb1a73a742e09c76cca86a7e77fbf19900e8c3b
parent0853055ef7642ef1bff6beeb8a3f3348343e4d44 (diff)
AGESA f14: Fix infinite loop
Fix regression after commit: 22f32c7 cpu/amd/agesa: Unify init files Change-Id: I36fb7369084c68577df69abc251c84dad64f7015 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18822 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index ecf1cfb968..3103dd5d3b 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -62,7 +62,7 @@ static void model_14_init(device_t dev)
msr.lo = msr.hi = 0x1e1e1e1e;
wrmsr(0x250, msr);
wrmsr(0x258, msr);
- for (msrno = 0x268; msrno <= 0x26f; i++)
+ for (msrno = 0x268; msrno <= 0x26f; msrno++)
wrmsr(msrno, msr);
msr = rdmsr(SYSCFG_MSR);