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authorDan Lykowski <lykowdk@gmail.com>2009-01-12 16:16:08 +0000
committerMarc Jones <marc.jones@amd.com>2009-01-12 16:16:08 +0000
commit6ef8e0f3e3a9044aa326a62e47b71670d9a218b7 (patch)
treec839a5d4b359e33a5f28673a3aec5b0b4d183823
parent6fa7e6dae97853c948d1b5e5cffb35fa0f042dc5 (diff)
Check to see if K8 processor is capable of changing FIDVID otherwise it will throw a GP# when reading FIDVID_STATUS
Signed-off-by: Dan Lykowski <lykowdk@gmail.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/amd/dbm690t/cache_as_ram_auto.c27
-rw-r--r--src/mainboard/amd/pistachio/cache_as_ram_auto.c27
-rw-r--r--src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c11
3 files changed, 49 insertions, 16 deletions
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
index 6c8d9e3542..76ce93bf07 100644
--- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
+++ b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
@@ -161,6 +161,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
int needs_reset = 0;
u32 bsp_apicid = 0;
msr_t msr;
+ struct cpuid_result cpuid1;
struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE);
@@ -197,16 +198,26 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
rs690_early_setup();
sb600_early_setup();
- msr=rdmsr(0xc0010042);
- printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
- enable_fid_change();
- enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
- init_fidvid_bsp(bsp_apicid);
+ /* Read FIDVID_STATUS */
+ msr=rdmsr(0xc0010042);
+ printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
- /* show final fid and vid */
- msr=rdmsr(0xc0010042);
- printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ enable_fid_change();
+ enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+ init_fidvid_bsp(bsp_apicid);
+
+ /* show final fid and vid */
+ msr=rdmsr(0xc0010042);
+ printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+
+ } else {
+ printk_debug("Changing FIDVID not supported\n");
+ }
needs_reset = optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
index 52b5c0400a..c348a61f9d 100644
--- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c
+++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
@@ -155,6 +155,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
int needs_reset = 0;
u32 bsp_apicid = 0;
msr_t msr;
+ struct cpuid_result cpuid1;
struct sys_info *sysinfo =
(struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE -
DCACHE_RAM_GLOBAL_VAR_SIZE);
@@ -198,16 +199,26 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x04);
- msr = rdmsr(0xc0010042);
- printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
- enable_fid_change();
- enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
- init_fidvid_bsp(bsp_apicid);
+ /* Read FIDVID_STATUS */
+ msr=rdmsr(0xc0010042);
+ printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
- // show final fid and vid
- msr = rdmsr(0xc0010042);
- printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ enable_fid_change();
+ enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+ init_fidvid_bsp(bsp_apicid);
+
+ /* show final fid and vid */
+ msr=rdmsr(0xc0010042);
+ printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+
+ } else {
+ printk_debug("Changing FIDVID not supported\n");
+ }
post_code(0x05);
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index 5b217a6711..7e60c2c7a1 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -259,6 +259,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
int needs_reset; int i;
unsigned bsp_apicid = 0;
+ struct cpuid_result cpuid1;
if (bist == 0) {
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
@@ -311,8 +312,13 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
#if K8_SET_FIDVID == 1
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
{
+ /* Read FIDVID_STATUS */
msr_t msr;
msr=rdmsr(0xc0010042);
print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
@@ -332,6 +338,11 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
}
+
+ } else {
+ print_debug("Changing FIDVID not supported\n");
+ }
+
#endif
#if 1