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| author | Marc Jones <marc.jones@amd.com> | 2008-04-24 19:49:59 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2008-04-24 19:49:59 +0000 |
| commit | 403b89a14f379759fb2a297dfab14ec9dbfffa7a (patch) | |
| tree | 2145794fc1ed99d6b497605da2a547d12f97d8dc | |
| parent | 202625e61f2f91bb2df0a121245ac2ebd13a7948 (diff) | |
On APs the ClLinesToNbDis was being left enabled from CAR setup.
Disabling it should help performance.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/cpu/amd/model_10xxx/init_cpus.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index 16b5a3d928..2de1ad6bdb 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -295,6 +295,13 @@ static void enable_apic_ext_id(u32 node) static void STOP_CAR_AND_CPU() { + msr_t msr; + + /* Disable L2 IC to L3 connection (Only for CAR) */ + msr = rdmsr(BU_CFG2); + msr.lo &= ~(1 << ClLinesToNbDis); + wrmsr(BU_CFG2, msr); + disable_cache_as_ram(); // inline stop_this_cpu(); } |