diff options
| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2020-07-06 21:44:54 +0530 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2020-07-23 04:54:38 +0000 |
| commit | 21b303dc54329c910a20d4a61ece7225a20815e4 (patch) | |
| tree | 82fc3646b2e7b41092b83e4ff234abb7a4f905a6 | |
| parent | c529e6ca7c82af9bea730acd83e1d85c673e5d77 (diff) | |
mb/intel/jasperlake_rvp: Skip CPU Replacement Check for jasperlake rvp
This patch enables the SkipCpuReplacementCheck config for jasperlake rvp
to avoid the forced MRC training with the soldered down SOC.
BUG=b:160201335
BRANCH=None
TEST=Build and verify on jasperlake rvp with CSE Lite SKU.
Cq-Depend: chrome-internal:3142530
Change-Id: I40fb9a25170e8db3c63a71428ba459160a918961
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43146
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index 14ca4a5abd..616e35c1b4 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -55,6 +55,9 @@ chip soc/intel/jasperlake # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" + # Skip the CPU repalcement check + register "SkipCpuReplacementCheck" = "1" + register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHdaEnable" = "0" register "PchHdaAudioLinkSspEnable[0]" = "1" |