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author | Evgeny Zinoviev <me@ch1p.io> | 2021-02-05 19:12:28 +0300 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-07 21:54:27 +0000 |
commit | 1649e0a549b27c7f66e905e1309b5f0e6a310c51 (patch) | |
tree | b4ad1a5eee050df80dc1d0281058cb2b0848f922 | |
parent | 07dda337b78be64c6064fcce14ccb5d1f7fdace2 (diff) |
util/autoport: Fix a typo in readme.md
Change-Id: Ifa1e751354c644e2ad9613253b90eb5db0a1f043
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r-- | util/autoport/readme.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/util/autoport/readme.md b/util/autoport/readme.md index f2b2697da6..907d6009db 100644 --- a/util/autoport/readme.md +++ b/util/autoport/readme.md @@ -269,7 +269,7 @@ If several slots are soldered there are two ways to handle them: * If they use different data, use several files. If memory initialization is not working, in particular write training (timB) -on DIMM's second rank fails, try enbling rank 1 mirroring, which can't be +on DIMM's second rank fails, try enabling rank 1 mirroring, which can't be detected by inteltool. It is described by SPD field "Address Mapping from Edge Connector to DRAM", byte `63` (`0x3f`). Bit 0 describes Rank 1 Mapping, 0 = standard, 1 = mirrored; set it to 1. Bits 1-7 are reserved. |