diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2013-05-01 11:27:58 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-25 23:11:28 +0100 |
commit | 144f7b29ad995da897ec6c6ee4f87bed2ec7d28e (patch) | |
tree | f9502c18a9554f44c3a1f034da21e127c7c5d495 | |
parent | 764d009a615a3c1bdc42aef5506fc9b199bf5047 (diff) |
lynxpoint: Add missing ME MBP entries
There were two undefined MBP types that are now defined.
These include NFC status and some interesting timing data.
ME: Wake Event to ME Reset: 6 ms
ME: ME Reset to Platform Reset: 7 ms
ME: Platform Reset to CPU Reset: 51 ms
Change-Id: I67bf1f303f3c32497041e64c40eb9ccb6a63d88a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49756
Reviewed-on: http://review.coreboot.org/4152
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r-- | src/southbridge/intel/lynxpoint/me.h | 17 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/me_9.x.c | 17 |
2 files changed, 33 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h index a30582293d..d919107609 100644 --- a/src/southbridge/intel/lynxpoint/me.h +++ b/src/southbridge/intel/lynxpoint/me.h @@ -334,6 +334,7 @@ void intel_me8_finalize_smm(void); #define MBP_APPID_INTEL_AT 3 #define MBP_APPID_HWA 4 #define MBP_APPID_ICC 5 +#define MBP_APPID_NFC 6 /* Kernel items: */ #define MBP_KERNEL_FW_VER_ITEM 1 #define MBP_KERNEL_FW_CAP_ITEM 2 @@ -341,12 +342,15 @@ void intel_me8_finalize_smm(void); #define MBP_KERNEL_PLAT_KEY_ITEM 4 #define MBP_KERNEL_FW_TYPE_ITEM 5 #define MBP_KERNEL_MFS_FAILURE_ITEM 6 +#define MBP_KERNEL_PLAT_TIME_ITEM 7 /* Intel AT items: */ #define MBP_INTEL_AT_STATE_ITEM 1 /* ICC Items: */ #define MBP_ICC_PROFILE_ITEM 1 /* HWA Items: */ #define MBP_HWA_REQUEST_ITEM 1 +/* NFC Items: */ +#define MBP_NFC_SUPPORT_DATA_ITEM 1 #define MBP_MAKE_IDENT(appid, item) ((appid << 8) | item) #define MBP_IDENT(appid, item) \ @@ -453,6 +457,17 @@ typedef struct { } __attribute__ ((packed)) mbp_at_state; typedef struct { + u32 wake_event_mrst_time_ms; + u32 mrst_pltrst_time_ms; + u32 pltrst_cpurst_time_ms; +} __attribute__ ((packed)) mbp_plat_time; + +typedef struct { + u32 device_type : 2; + u32 reserved : 30; +} __attribute__ ((packed)) mbp_nfc_data; + +typedef struct { mbp_fw_version_name *fw_version_name; mbp_mefwcaps *fw_capabilities; mbp_rom_bist_data *rom_bist_data; @@ -461,6 +476,8 @@ typedef struct { mbp_icc_profile *icc_profile; mbp_at_state *at_state; u32 *mfsintegrity; + mbp_plat_time *plat_time; + mbp_nfc_data *nfc_data; } me_bios_payload; struct me_fwcaps { diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index a16879b757..01eb8447c6 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -712,12 +712,21 @@ static void intel_me_init(device_t dev) if (intel_mei_setup(dev) < 0) return; - if(intel_me_read_mbp(&mbp_data, dev)) + if (intel_me_read_mbp(&mbp_data, dev)) return; #if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) me_print_fw_version(mbp_data.fw_version_name); me_print_fwcaps(mbp_data.fw_capabilities); + + if (mbp_data.plat_time) { + printk(BIOS_DEBUG, "ME: Wake Event to ME Reset: %u ms\n", + mbp_data.plat_time->wake_event_mrst_time_ms); + printk(BIOS_DEBUG, "ME: ME Reset to Platform Reset: %u ms\n", + mbp_data.plat_time->mrst_pltrst_time_ms); + printk(BIOS_DEBUG, "ME: Platform Reset to CPU Reset: %u ms\n", + mbp_data.plat_time->pltrst_cpurst_time_ms); + } #endif /* @@ -923,6 +932,12 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data, device_t dev) case MBP_IDENT(KERNEL, MFS_FAILURE): ASSIGN_FIELD_PTR(mfsintegrity, &mbp->data[i+1]); + case MBP_IDENT(KERNEL, PLAT_TIME): + ASSIGN_FIELD_PTR(plat_time, &mbp->data[i+1]); + + case MBP_IDENT(NFC, SUPPORT_DATA): + ASSIGN_FIELD_PTR(nfc_data, &mbp->data[i+1]); + default: printk(BIOS_ERR, "ME MBP: unknown item 0x%x @ dw offset 0x%x\n", mbp->data[i], i); |