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authorRaul E Rangel <rrangel@chromium.org>2021-05-07 10:47:34 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-09 18:08:20 +0000
commit6ddace437cba9a7e697437d7c7ccc4a779efd08f (patch)
treef0c7635a35355110a1d37a370c840b2b2cc491a0 /3rdparty/stm
parent9b330fafebacee293a732e3c23dae6d6b04f57c5 (diff)
soc/amd/common/block/pci: Introduce struct pci_routing_info
This struct is similar to `struct pci_routing` defined in picasso/pcie_gpp.c. It additionally contains the irq used for the bridge and is structured in a way that the FSP can provide via HOB. The next set of CLs will migrate the pci routing functions used by picasso into common and enable pci routing table generation for cezanne. BUG=b:184766519 TEST=Build guybrush Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I1a8d988d125f407f0aa7bc1722d432446aa9aff8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/53922 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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