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author | Felix Held <felix-coreboot@felixheld.de> | 2022-12-08 18:33:40 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-13 13:55:29 +0000 |
commit | 6c11676dc664c966bd00faa072413eb561ceabef (patch) | |
tree | 25ee7278f34195e0e5691a93090e8599e738aa03 /3rdparty/intel-microcode | |
parent | 6a1af48c580aee75d0fd484e8a8e9b5282793f91 (diff) |
soc/amd/common/block/acpi.ivrs: use SMBUS_DEVFN for FCH IOAPIC device ID
Instead of using PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC), use the equivalent
SMBUS_DEVFN define.
Even though the FCH IOAPIC is in the LPC part of the FCH, it needs the
IVRS IOAPIC table's source_dev_id field set to SMBUS_DEVFN which is the
function 0 of the FCH PCI device. LPC is function 3 of the FCH device.
When assigning LPC_DEVFN to source_dev_id, the kernel from Ubuntu
2022.04 LTS complains about the IOAPIC part of the IVRS table being
wrong:
AMD-Vi: [Firmware Bug]: : No southbridge IOAPIC found
AMD-Vi: Disabling interrupt remapping
With SMBUS_DEVFN being used as source_dev_id, no such error is reported.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Change-Id: I8470d67b2513031e75fb422d4c1c181e017ace0a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to '3rdparty/intel-microcode')
0 files changed, 0 insertions, 0 deletions