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authorJohn Zhao <john.zhao@intel.com>2020-05-19 11:10:21 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-05-26 15:02:16 +0000
commit7d054bd38f5cfe36f6abd4f4422c463243bc3749 (patch)
tree3babb7b0e12f0bd89e332516fd35c35f34050a2e /3rdparty/intel-microcode
parente6e9fa6ef90bc62d645da942f3bdc7bdeb1c1930 (diff)
soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method
CPU to PCH method refers to PCH ACPI operation region which was wrongly defined as SystemMemory and PCH_PWRM_BASE_ADDRESS. Change the operation region to be SystemIO and ACPI_BASE_ADDRESS. BUG=b:156530805 TEST=Built and booted to kernel. Signed-off-by: John zhao <john.zhao@intel.com> Change-Id: Ifa291a993ec23e1e4dfad8f6cdfabc80b824d20c Reviewed-on: https://review.coreboot.org/c/coreboot/+/41537 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to '3rdparty/intel-microcode')
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