summaryrefslogtreecommitdiff
path: root/.gitreview
diff options
context:
space:
mode:
authorLijian Zhao <lijian.zhao@intel.com>2018-04-10 10:33:05 -0700
committerAaron Durbin <adurbin@chromium.org>2018-04-10 18:08:05 +0000
commite09ba47b8ba213e9a9d17c3fc0defb857e415100 (patch)
tree6ccc983ca222bcd0d44fb5298ecbce4612d86813 /.gitreview
parent551e4be7301eca04104c8f0d4379b906dfb07c1b (diff)
soc/intel/cannonlake: Set Cannonlake I2C clock
Correct Cannonlake I2C clock frequency to 133Mhz that will match the silicon, Cannonlake have I2C clock force to 133Mhz. BUG=b:75306520 Change-Id: Iaab8851bb00cf27876d4068167a283ed79a28b2d Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/25610 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '.gitreview')
0 files changed, 0 insertions, 0 deletions