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authorAaron Durbin <adurbin@chromium.org>2013-10-08 15:33:39 -0500
committerAaron Durbin <adurbin@google.com>2014-02-11 22:20:28 +0100
commit1f5eb1f78e839a5dc1454c20060ccca14a74deb5 (patch)
tree0b3147028a2c636580ff58ea9b20d2797605ab91 /.gitreview
parent5f8ad56358b04ba0b0752944d2ed643d4df9c480 (diff)
rambi: add per-sku SPD support
There are currently 4 SKUs: 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz 0b010 - 2GiB total - 2 x 1GiB Micron MT41K128M16JT-125:K 1600MHz 0b011 - 2GiB total - 2 x 1GiB Hynix H5TC2G63FFR-PBA 1600MHz Add each of the 4 spds to the build, and use the proper parameters to MRC to use the in-memory SPD information. BUG=chrome-os-partner:22865 BRANCH=None TEST=Built. Noted 1024 bytes of SPD content. Change-Id: Ife96650f9b0032b6bd0d1bdd63b8970e29868365 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172280 Reviewed-on: http://review.coreboot.org/4872 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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