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authorMarx Wang <marx.wang@intel.corp-partner.google.com>2023-10-19 15:15:22 +0800
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-10-28 21:02:09 +0000
commitbe0e694fcf326b15c15dc62ccb701d3de46b9702 (patch)
tree7df1932f71fa9fbc38944206b5a64fb1dbd45558 /.gitreview
parente68650a656e185c7b056d62a79611ec2ad93e7dd (diff)
soc/intel/meteorlake: Expose In-Band ECC UPD config to mainboard
Meteor Lake has a UPD config called In-Band ECC(IBECC) which uses a part of the system DRAM to store the ECC information. There are a few UPD parameters in FSP-M to configure this feature as needed. This patch adds code to expose these parameters to the devicetree so that they can be configured on the mainboard level as needed. Change-Id: Ice1ede430d36dff4175a92941ee85cc933fa56d5 Signed-off-by: Marx Wang <marx.wang@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78485 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
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