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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2019-05-15 08:42:20 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-20 16:28:38 +0000 |
| commit | ddbf2c4af05b5cbd889d6a55e67734c8a041bc66 (patch) | |
| tree | a2dab6ce14d19de9789773397044ae85a1d6158b /.gitreview | |
| parent | 334e8360efb03644488ce4ac8a9a9e75ef6fa6c0 (diff) | |
soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.
When FSP UPD parameters are configured, also configure the GSPI CS lines
appropriately. GSPI driver assumes CS0 is the CS signal to use.
BUG=b:130329260
BRANCH=None
TEST=Boot Kohaku, TPM communcation still functional.
Change-Id: Ic816395b7d198a52c704e6cabcb56889150b741c
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32791
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '.gitreview')
0 files changed, 0 insertions, 0 deletions