summaryrefslogtreecommitdiff
path: root/.gitreview
diff options
context:
space:
mode:
authorPatrick Rudolph <patrick.rudolph@9elements.com>2018-03-27 16:06:34 +0200
committerPatrick Rudolph <siro@das-labor.org>2018-05-24 15:05:19 +0000
commit6308e0e92f624cb18a875ed04e41e1d15fc91054 (patch)
treeacf117900e6cd9243cae5894b61264663a78cafd /.gitreview
parent21fa51475d86e5c68b5dd46233fb7889516def78 (diff)
mb/hp: Add new port compaq_8200_elite_sff
Add new port based on autoport. The board uses a NPCD378 SuperIO, that is full of custom hardware. The 8MiB flash SOIC-8 can be accessed after cutting of a part of the DIMM slot holder. The flash IC has no diode, powering a part of the board while flashing externaly, including the Standby-LED. The following have been tested and is working: * Native raminit with up to four DIMMs * Libgfxinit on DisplayPort * USB * EHCI debug * Serial on RS232 * Ethernet * PCIe on x4 * PCIe on x16 * SATA * Booting GNU Linux 4.14 using SeaBIOS 1.11.1 as payload * Flashing internaly * PS/2 is working Untested: * PCI slot * LPT port * VBIOS * S3 resume Not working: * PSU fan managment (runs at 100%) * Half of SuperIO functionality is unknown TODO: * Reverse engineer remaining SuperIO registers * Reverse engineer SMM Fixes on follow-up commits: * Added PSU fan control * Reverse engineered some of Super IO's HWM registers * Added SMBIOS tables for IPMI Change-Id: I4ee8da6349222fda8b6c30a7210ffdd65c183439 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/25385 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '.gitreview')
0 files changed, 0 insertions, 0 deletions