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author | Max Blau <tripleshiftone@gmail.com> | 2019-04-29 23:46:20 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2019-05-01 00:09:57 +0000 |
commit | 13bfd04a99544f5114e823eaa3ce06fece390915 (patch) | |
tree | 7a1981ecc8f6c33fd02b7d77391f465279f48117 /.gitmodules | |
parent | 22e605c2c06f553b98131a87b634709aa1818e1f (diff) |
superio/fintek/f71808a: Add more optional ramstage registers
Add more registers and make them optional, so they keep untouched/
their default if omitted.
Change-Id: I5d8008176d2972976b387c558658b8e70b50af8e
Signed-off-by: Max Blau <tripleshiftone@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to '.gitmodules')
0 files changed, 0 insertions, 0 deletions