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authorFurquan Shaikh <furquan@google.com>2018-06-26 18:10:07 -0700
committerFurquan Shaikh <furquan@google.com>2018-06-28 05:00:12 +0000
commita00c7774d8be5802268c0139a405f1dde38971ea (patch)
tree6f1bfcfa4c1dd1ba67e2414629d3633262180350 /.gitmodules
parent14e8f20edca4e33fcd5fda8d0977ee96864e60b4 (diff)
soc/intel/common: Disable GPEs just before enabling SMIs
Call to pmc_disable_all_gpe is required before enabling SMIs to ensure that we do not end up in a recursive SMI handler loop as mentioned in change 74145f7 (intel/common/pmc: Disable all GPEs during pmc_init). Thus, this call was added at the end of pmc_fill_power_state as we want to ensure that all the GPE registers are backed up before being cleared for identifying the wake source in ramstage. This resulted in a side-effect on APL where pmc_fixup_power_state was called much later in the boot process. Even though we have got rid of pmc_fixup_power_state, this change moves the call to pmc_disable_all_gpe to happen just before enabling SMIs. This helps to keep the disabling of GPEs logically before the enabling of SMIs and any clean ups that happen in pmc or soc-specific code should not affect the state of GPEs. BUG=b:110836465 TEST=Verified that wake sources are correctly identified on KBL and APL. Also, no SMI handler issues observed when resuming. Change-Id: I122a8118edcec117f25beee71a23c0a44ae862ed Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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