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| author | Tarun Tuli <taruntuli@google.com> | 2022-07-26 14:04:31 -0400 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-29 15:06:17 +0000 |
| commit | 5c83d5efb70199599395093ca7d6d1a57eb516f8 (patch) | |
| tree | a82acc7a56bd25a2895707b534011f268b89988b /.gitmodules | |
| parent | 0d13e80852832368ac7ed51f8d04011a71ddbbc2 (diff) | |
mb/google/rex: Add LP5 RAM IDs
Create RAM IDs for:
DRAM Part Name ID to assign
MT62F512M32D2DR-031 WT:B 0 (0000)
MT62F1G32D2DS-026 WT:B 1 (0001)
MT62F2G32D4DS-026 WT:B 2 (0010)
BUG=b:240289148
TEST=emerge-rex coreboot
Signed-off-by: Tarun Tuli <taruntuli@google.com>
Change-Id: Ib24e07bca363984db3484aa500f7d6ea4817e517
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Diffstat (limited to '.gitmodules')
0 files changed, 0 insertions, 0 deletions