commonlib/lz4: Avoid unaligned memory access on RISC-V

From the User-Level ISA Specification v2.0:

   "We do not mandate atomicity for misaligned accesses so simple
    implementations can just use a machine trap and software handler to
    handle misaligned accesses." (— http://riscv.org/specifications/)

Spike traps on unaligned accesses.

Change-Id: Ia57786916f4076cc08513f4e331c2deec9cfa785
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14983
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

0 files changed, 0 insertions, 0 deletions