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authorRonak Kanabar <ronak.kanabar@intel.com>2020-03-23 17:17:47 +0530
committerFurquan Shaikh <furquan@google.com>2020-03-31 18:07:40 +0000
commit3e666898cd99f4e15a39e360bb594d499e738b2d (patch)
tree3d30525f11bae4ad400b565e184451c0cc31b420 /.editorconfig
parent45808399fc04e7c623af6ee1e7c7686fab09e790 (diff)
vendorcode/intel/fsp: Update FSP header for Tiger Lake
Update FSPM header to include DisableDimmCh Upds for Tiger Lake platform version 2457. BUG=b:152000235 BRANCH=none TEST="Build and Boot on Ripto/Volteer" Change-Id: Ic743cb2134e6273a63c1212506c81ccbbdec442a Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
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