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authorEdward O'Callaghan <quasisec@google.com>2019-12-18 11:04:20 +1100
committerPatrick Georgi <pgeorgi@google.com>2019-12-20 07:23:34 +0000
commitb61f33cd484ece8c86acdce2740d0ab4018f3f30 (patch)
treea4eb30208b4225af548c7493cdccde16c44793be /.clang-format
parentd4823664a895546ac699cc70e41a94f943b364f8 (diff)
mainboard/google/puff: Enable pcie7 ep in dt
Missing bus init for RTL8111H ethernet chip hanging on bus. V.2: Include admendments from Kangheui. BRANCH=none BUG=b:146437819 TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: I22aba312f183ea05eeb81d326ca0c05ce340a2e8 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37804 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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