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authorElyes HAOUAS <ehaouas@noos.fr>2020-05-03 08:30:09 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-24 11:52:28 +0000
commitfac2893584514afb1d64e71167a8564d1da26c26 (patch)
treea281001cf187c5896297d36caf8d07a480d6b636 /.clang-format
parenta23aff365186ea8859e1c1c1b0f51f7566f231e9 (diff)
soc/intel/broadwell/adsp: Fix 8-bit write on PCI_INTERRUPT_LINE register
The PCI_INTERRUPT_LINE register is one byte wide. Possible side effects of clearing the three bytes after PCI_INTERRUPT_LINE are unknown. Change-Id: I64e785309b0bf7f4d74436ea12a2444092deae22 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41009 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '.clang-format')
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