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authorJohn Zhao <john.zhao@intel.com>2019-01-28 16:04:35 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-01-30 13:27:30 +0000
commit9a4beb429d87f9c0f46b7f945432a955cd88c962 (patch)
tree065966fa1d457b3ca976a29206dc1046bf265c25 /.clang-format
parenta35904b29cf4f2ae9ab56122a3b0ee6aa6ffb823 (diff)
soc/intel/apollolake: Sync fsp upd structure update
FSP 2.0.9 provides UPD interface to adjust integrated filter value, usb3 LDO and pmic vdd2 voltage. Change coreboot upd structure to sync with fsp 2.0.9 release. BUG=b:123398358 CQ-DEPEND=CL:*817128 TEST=Verified yorp boots to kernel. Change-Id: I3d17dfbe58bdc5222378459723da8e9ac0573510 Signed-off-by: John Zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/31131 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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