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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-11 22:13:44 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-04-08 06:49:55 +0000
commitfc862dd7d27edba14a406cf72b475afee252764e (patch)
tree6dc57d1681fd47f0c19ff3fc757cf6115683f833
parent1faaa16a0831ba0926f2a0b59cde19a95c72d5b2 (diff)
soc/intel/dnv_ns: hook up new gpio device operations
This change hooks up the new gpio operations in DNV-NS. Change-Id: I2179e641153da7230467c5766e4ded58fdb90292 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48618 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/denverton_ns/Makefile.inc1
-rw-r--r--src/soc/intel/denverton_ns/chip.c3
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc
index 105f866bf5..093854cb38 100644
--- a/src/soc/intel/denverton_ns/Makefile.inc
+++ b/src/soc/intel/denverton_ns/Makefile.inc
@@ -52,6 +52,7 @@ ramstage-y += tsc_freq.c
ramstage-y += spi.c
ramstage-y += fiamux.c
ramstage-y += hob_mem.c
+ramstage-y += gpio.c
ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 77ad8e7ddc..6a873530f6 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -9,6 +9,7 @@
#include <fsp/api.h>
#include <fsp/util.h>
#include <intelblocks/fast_spi.h>
+#include <intelblocks/gpio.h>
#include <soc/iomap.h>
#include <soc/intel/common/vbt.h>
#include <soc/pci_devs.h>
@@ -39,6 +40,8 @@ static void soc_enable_dev(struct device *dev)
dev->ops = &pci_domain_ops;
else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
dev->ops = &cpu_bus_ops;
+ else if (dev->path.type == DEVICE_PATH_GPIO)
+ block_gpio_enable(dev);
}
static void soc_init(void *data)