diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-10-03 12:33:20 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-03 06:48:16 +0000 |
commit | e8e0418d984f0ba4a6754ce37d6fe8ecc7cd4a2f (patch) | |
tree | 101baaacf02d3a4c6a8c7d2a71a0f45bd9b4bc1d | |
parent | 2d7d0d0e661147c0fa8d7583eabaa8a4753077e5 (diff) |
configs: Add a weird config for Portwell M107
This is not meant for actual use, but to build-test several options.
Please do not try to use it on real hardware. Or maybe do try.
The purpose of this config is to build-test the individual options, not
their combination. So, for instance, if it would be hard to keep options
x, y and z build together in the future, this config shouldn't block a
change but should instead be adapted, e.g. split into multiple chunks.
Change-Id: Ife40d055e4c9b295c54cfc6a27af06e9358f7761
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45974
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi b/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi new file mode 100644 index 0000000000..09dfbe35cf --- /dev/null +++ b/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi @@ -0,0 +1,41 @@ +# Not meant for actual use, but rather to build-test individual options. +# If keeping this combination of options buildable becomes too hard in +# the future, then this config can be split into several smaller chunks. +# Exercises, among other things: +# + SMMSTORE +# + OXPCIE support +# + FSP MP init +# + EM100Pro SPI console +# + Debug options +CONFIG_VENDOR_PORTWELL=y +CONFIG_CONSOLE_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_ENABLE_BUILTIN_COM1=y +CONFIG_ONBOARD_MEM_KINGSTON=y +CONFIG_USE_INTEL_FSP_MP_INIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y +CONFIG_SOC_INTEL_DEBUG_CONSENT=y +CONFIG_PCIEXP_HOTPLUG=y +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y +CONFIG_SOFTWARE_I2C=y +CONFIG_SMMSTORE=y +CONFIG_SPI_FLASH_NO_FAST_READ=y +CONFIG_DRIVERS_UART_OXPCIE=y +CONFIG_DRIVERS_GENESYSLOGIC_GL9755=y +CONFIG_DISPLAY_HOBS=y +CONFIG_DISPLAY_VBT=y +CONFIG_DISPLAY_FSP_ENTRY_POINTS=y +CONFIG_DISPLAY_UPD_DATA=y +CONFIG_EM100PRO_SPI_CONSOLE=y +CONFIG_DISPLAY_MTRRS=y +CONFIG_GDB_STUB=y +CONFIG_GDB_WAIT=y +CONFIG_FATAL_ASSERTS=y +CONFIG_DEBUG_CBFS=y +CONFIG_DEBUG_SMBUS=y +CONFIG_DEBUG_SMI=y +CONFIG_DEBUG_PERIODIC_SMI=y +CONFIG_DEBUG_MALLOC=y +CONFIG_DEBUG_CONSOLE_INIT=y +CONFIG_REALMODE_DEBUG=y +CONFIG_DEBUG_BOOT_STATE=y |