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| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-12-15 14:31:49 +0100 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-04 10:41:39 +0000 |
| commit | d3d62d4af90562056d8d1aa61ccc6640613b95f6 (patch) | |
| tree | 8a7698dc2edddc92b992bb03bfb6ef9f8b3e669d | |
| parent | 37a2fb535356efd016ccdb24f1824690c01f7b2a (diff) | |
Makefile.mk: Also add -libs to bootblock when !SEPARATE_ROMSTAGE
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I18bf67cae7af90a92a030e552af6dc6b134a8357
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79575
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
| -rw-r--r-- | Makefile.mk | 1 | ||||
| -rw-r--r-- | src/vendorcode/amd/pi/Makefile.mk | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/Makefile.mk b/Makefile.mk index 3f39a6edee..d7110a9caa 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -1307,6 +1307,7 @@ $(CONFIG_CBFS_PREFIX)/romstage-options += $(TXTIBB) endif else # CONFIG_SEPARATE_ROMSTAGE postinclude-hooks += $$(eval bootblock-srcs += $$(romstage-srcs)) +postinclude-hooks += $$(eval bootblock-libs += $$(romstage-libs)) endif cbfs-files-$(CONFIG_HAVE_RAMSTAGE) += $(CONFIG_CBFS_PREFIX)/ramstage diff --git a/src/vendorcode/amd/pi/Makefile.mk b/src/vendorcode/amd/pi/Makefile.mk index 5cd12545ae..446e9d4779 100644 --- a/src/vendorcode/amd/pi/Makefile.mk +++ b/src/vendorcode/amd/pi/Makefile.mk @@ -160,7 +160,6 @@ $(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) @printf " AGESA $(subst $(obj)/,,$(@))\n" $(AR_libagesa) rcsDT $@ $+ -bootblock-libs += $(agesa_output_path)/libagesa.a romstage-libs += $(agesa_output_path)/libagesa.a ramstage-libs += $(agesa_output_path)/libagesa.a |