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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-19 07:09:14 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-23 02:37:09 +0000
commitc92c5e5450b7618b28e3f07a040efdd79293844f (patch)
tree0c24292011dc52dd98034ce2072349f7d5a1dc43
parent3051a9ecfa4796de3e60b22df808a61e20da3b43 (diff)
nb/intel/ironlake: Drop redundant clear of SLP_TYP
Bits are already cleared in southbridge_detect_s3_resume(). Change-Id: If8bb85abacd59c7968876906e126300c9e4314e2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50975 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/northbridge/intel/ironlake/raminit.c5
-rw-r--r--src/northbridge/intel/ironlake/romstage.c10
2 files changed, 0 insertions, 15 deletions
diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c
index 3908504832..39a936914b 100644
--- a/src/northbridge/intel/ironlake/raminit.c
+++ b/src/northbridge/intel/ironlake/raminit.c
@@ -4698,14 +4698,9 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
if (!s3resume)
save_timings(&info);
if (s3resume && cbmem_wasnot_inited) {
- u32 reg32;
printk(BIOS_ERR, "Failed S3 resume.\n");
ram_check_nodie(1 * MiB);
- /* Clear SLP_TYPE. */
- reg32 = inl(DEFAULT_PMBASE + 0x04);
- outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
-
/* Failed S3 resume, reset to come up cleanly */
full_reset();
}
diff --git a/src/northbridge/intel/ironlake/romstage.c b/src/northbridge/intel/ironlake/romstage.c
index 6b9f3d0e83..8d3cfd6811 100644
--- a/src/northbridge/intel/ironlake/romstage.c
+++ b/src/northbridge/intel/ironlake/romstage.c
@@ -24,7 +24,6 @@
*/
void mainboard_romstage_entry(void)
{
- u32 reg32;
int s3resume = 0;
u8 spd_addrmap[4] = {};
@@ -60,14 +59,5 @@ void mainboard_romstage_entry(void)
intel_early_me_status();
- if (s3resume) {
- /*
- * Clear SLP_TYPE. This will break stage2 but
- * we care for that when we get there.
- */
- reg32 = inl(DEFAULT_PMBASE + 0x04);
- outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
- }
-
romstage_handoff_init(s3resume);
}