mb/msi/ms7d25: Add support for DDR5 variant

The DDR5 board is almost identical to the DDR4 one. The only major
difference is the board's DDR5 memory design.

TEST=Boot MSI PRO Z690-A board successfully to Ubuntu 22.04. Memory:
Crucial CT8G48C40U5.M4A1 in all 4 slots.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I652a879d1616df4708fe4690797ad98384897f53
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>

6 files changed, 59 insertions, 4 deletions

diff --git a/configs/config.msi_ms7d25 b/configs/config.msi_ms7d25_ddr4
index e6d85e0239..e6d85e0239 100644
--- a/configs/config.msi_ms7d25
+++ b/configs/config.msi_ms7d25_ddr4
diff --git a/configs/config.msi_ms7d25_ddr5 b/configs/config.msi_ms7d25_ddr5
new file mode 100644
index 0000000000..e26e99e817
--- /dev/null
+++ b/configs/config.msi_ms7d25_ddr5
@@ -0,0 +1,21 @@
+CONFIG_VENDOR_MSI=y
+CONFIG_CBFS_SIZE=0x1000000
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_EDK2_BOOT_TIMEOUT=3
+CONFIG_BOARD_MSI_Z690_A_PRO_WIFI_DDR5=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_POST_DEVICE_PCI_PCIE=y
+CONFIG_POST_IO_PORT=0x80
+CONFIG_PAYLOAD_EDK2=y
+CONFIG_EDK2_REPOSITORY="https://github.com/Dasharo/edk2.git"
+CONFIG_EDK2_TAG_OR_REV="origin/dasharo"
+CONFIG_EDK2_CBMEM_LOGGING=y
+CONFIG_EDK2_FOLLOW_BGRT_SPEC=y
+CONFIG_EDK2_SD_MMC_TIMEOUT=1000
+CONFIG_TPM2=y
+CONFIG_TPM_MEASURED_BOOT=y
+CONFIG_DRIVERS_GENERIC_CBFS_SERIAL=y
+CONFIG_DRIVERS_GENERIC_CBFS_UUID=y
diff --git a/src/mainboard/msi/ms7d25/Kconfig b/src/mainboard/msi/ms7d25/Kconfig
index 0c8130fbfe..b5c1a46d19 100644
--- a/src/mainboard/msi/ms7d25/Kconfig
+++ b/src/mainboard/msi/ms7d25/Kconfig
@@ -1,6 +1,9 @@
 config BOARD_MSI_Z690_A_PRO_WIFI_DDR4
 	select BOARD_MSI_MS7D25
 
+config BOARD_MSI_Z690_A_PRO_WIFI_DDR5
+	select BOARD_MSI_MS7D25
+
 config BOARD_MSI_MS7D25
 	def_bool n
 	select SOC_INTEL_ALDERLAKE_PCH_S
@@ -21,6 +24,7 @@ config MAINBOARD_DIR
 
 config MAINBOARD_PART_NUMBER
 	default "PRO Z690-A WIFI DDR4(MS-7D25)" if BOARD_MSI_Z690_A_PRO_WIFI_DDR4
+	default "PRO Z690-A WIFI (MS-7D25)" if BOARD_MSI_Z690_A_PRO_WIFI_DDR5
 
 config MAINBOARD_VENDOR
 	string
@@ -30,6 +34,10 @@ config MAINBOARD_FAMILY
 	string
 	default "Default string"
 
+config MAINBOARD_VERSION
+	string
+	default "2.0" if BOARD_MSI_Z690_A_PRO_WIFI_DDR5
+
 config DIMM_SPD_SIZE
 	default 512
 
diff --git a/src/mainboard/msi/ms7d25/Kconfig.name b/src/mainboard/msi/ms7d25/Kconfig.name
index 05a8ceee9d..2ff2df7de9 100644
--- a/src/mainboard/msi/ms7d25/Kconfig.name
+++ b/src/mainboard/msi/ms7d25/Kconfig.name
@@ -1,2 +1,5 @@
 config BOARD_MSI_Z690_A_PRO_WIFI_DDR4
-	bool "PRO Z690-A WIFI DDR4"
+	bool "PRO Z690-A (WIFI) DDR4"
+
+config BOARD_MSI_Z690_A_PRO_WIFI_DDR5
+	bool "PRO Z690-A (WIFI)"
diff --git a/src/mainboard/msi/ms7d25/mainboard.c b/src/mainboard/msi/ms7d25/mainboard.c
index 9c3a3ae17e..539f897e7a 100644
--- a/src/mainboard/msi/ms7d25/mainboard.c
+++ b/src/mainboard/msi/ms7d25/mainboard.c
@@ -35,7 +35,6 @@ const char *smbios_system_product_name(void)
 
 const char *smbios_mainboard_product_name(void)
 {
-	/* Currently we support DDR4 variants, but e.g. DDR5 can be added later */
 	if (CONFIG(BOARD_MSI_Z690_A_PRO_WIFI_DDR4)) {
 		if (is_devfn_enabled(PCH_DEVFN_CNVI_WIFI))
 			return "PRO Z690-A WIFI DDR4(MS-7D25)";
@@ -43,6 +42,13 @@ const char *smbios_mainboard_product_name(void)
 			return "PRO Z690-A DDR4(MS-7D25)";
 	}
 
+	if (CONFIG(BOARD_MSI_Z690_A_PRO_WIFI_DDR5)) {
+		if (is_devfn_enabled(PCH_DEVFN_CNVI_WIFI))
+			return "PRO Z690-A WIFI (MS-7D25)";
+		else
+			return "PRO Z690-A (MS-7D25)";
+	}
+
 	return CONFIG_MAINBOARD_PART_NUMBER;
 }
 
diff --git a/src/mainboard/msi/ms7d25/romstage_fsp_params.c b/src/mainboard/msi/ms7d25/romstage_fsp_params.c
index 9199a81c1f..707f871cc5 100644
--- a/src/mainboard/msi/ms7d25/romstage_fsp_params.c
+++ b/src/mainboard/msi/ms7d25/romstage_fsp_params.c
@@ -10,11 +10,25 @@
 
 static const struct mb_cfg ddr4_mem_config = {
 	.type = MEM_TYPE_DDR4,
+	/* According to DOC #573387 rcomp values no longer have to be provided */
+	/* DDR DIMM configuration does not need to set DQ/DQS maps */
+	.UserBd = BOARD_TYPE_DESKTOP_2DPC,
+
+	.ddr_config = {
+		.dq_pins_interleaved = true,
+	},
+};
+
+static const struct mb_cfg ddr5_mem_config = {
+	.type = MEM_TYPE_DDR5,
+
+	.ect = true, /* Early Command Training */
 
 	/* According to DOC #573387 rcomp values no longer have to be provided */
 	/* DDR DIMM configuration does not need to set DQ/DQS maps */
+	.UserBd = BOARD_TYPE_DESKTOP_2DPC,
 
-	.UserBd = BOARD_TYPE_DESKTOP_2DPC, /* FIXME */
+	.LpDdrDqDqsReTraining = 1,
 
 	.ddr_config = {
 		.dq_pins_interleaved = true,
@@ -54,7 +68,10 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 	 */
 	memupd->FspmConfig.GpioOverride = 0;
 
-	memcfg_init(memupd, &ddr4_mem_config, &dimm_module_spd_info, false);
+	if (CONFIG(BOARD_MSI_Z690_A_PRO_WIFI_DDR4))
+		memcfg_init(memupd, &ddr4_mem_config, &dimm_module_spd_info, false);
+	if (CONFIG(BOARD_MSI_Z690_A_PRO_WIFI_DDR5))
+		memcfg_init(memupd, &ddr5_mem_config, &dimm_module_spd_info, false);
 
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 }