soc/amd/cezanne/Makefile.inc: Fix indentation

We don't use spaces.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Id617e98db5b0895071ee98265f68f6106058bd63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50336
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 45e98a5e48..7f59ef495e 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -12,24 +12,24 @@ all-y		+= aoac.c
 bootblock-y	+= bootblock.c
 bootblock-y	+= early_fch.c
 bootblock-y	+= gpio.c
-bootblock-y     += reset.c
+bootblock-y	+= reset.c
 bootblock-y	+= uart.c
 
 verstage_x86-y	+= gpio.c
-verstage_x86-y  += reset.c
+verstage_x86-y	+= reset.c
 verstage_x86-y	+= uart.c
 
 romstage-y	+= gpio.c
-romstage-y      += reset.c
+romstage-y	+= reset.c
 romstage-y	+= romstage.c
 romstage-y	+= uart.c
 
 ramstage-y	+= chip.c
 ramstage-y	+= fch.c
-ramstage-y      += fsp_params.c
+ramstage-y	+= fsp_params.c
 ramstage-y	+= gpio.c
 ramstage-y	+= pcie_gpp.c
-ramstage-y      += reset.c
+ramstage-y	+= reset.c
 ramstage-y	+= uart.c
 
 CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include