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authorRaul E Rangel <rrangel@chromium.org>2021-02-16 10:37:46 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-02-17 19:19:35 +0000
commit65819cd3644e96f191de04eae8219cab4bc86fb8 (patch)
tree2b4c577102d16d92d4aa114db6fdc500416da47a
parent0810538b63e87bec519f991ffb9e6181e7fe4821 (diff)
soc/amd/cezanne: Add FCH IO-APIC to MADT
TEST=Boot majolica to linux and see IO-APIC logs ACPI: Local APIC address 0xfee00000 ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1]) IOAPIC[0]: apic_id 16, version 33, address 0xfec00000, GSI 0-23 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) ACPI: IRQ0 used by override. ACPI: IRQ9 used by override. Using ACPI (MADT) for SMP configuration information Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ib8094c3edf401659d9d740e2cc6266ddd5f91da9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50803 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/soc/amd/cezanne/acpi.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c
index ae86d12e19..ee76ed3537 100644
--- a/src/soc/amd/cezanne/acpi.c
+++ b/src/soc/amd/cezanne/acpi.c
@@ -5,6 +5,8 @@
#include <acpi/acpi.h>
#include <amdblocks/acpi.h>
#include <amdblocks/acpimmio.h>
+#include <amdblocks/ioapic.h>
+#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
@@ -18,7 +20,10 @@ unsigned long acpi_fill_madt(unsigned long current)
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);
- /* TODO: Add IOAPIC and GNB-IOAPIC */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
+ FCH_IOAPIC_ID, IO_APIC_ADDR, 0);
+
+ /* TODO: Add GNB-IOAPIC */
current += acpi_create_madt_irqoverride(
(acpi_madt_irqoverride_t *)current,