diff options
| author | Martin Roth <martinroth@google.com> | 2016-09-29 14:46:24 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-30 23:57:02 +0200 |
| commit | 311fb696cfa6644ca82dca3e1ea825401779db51 (patch) | |
| tree | 8e304653a904088f9ca15104c5617eb947ab1733 | |
| parent | 48a0129d974bdd676f5c2ef7c2349c3e86ba8132 (diff) | |
Kconfig: Prefix hex defaults with 0x
Because these variables had "non-hexidecimal" defaults, they
were updated by kconfig when writing defconfig files.
Change-Id: Ic1a070d340708f989157ad18ddc79de7bb92d873
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16827
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rw-r--r-- | src/drivers/intel/fsp1_1/Kconfig | 4 | ||||
| -rw-r--r-- | src/drivers/uart/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/google/daisy/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/google/smaug/Kconfig | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig index 17a5caf6cf..306e09be74 100644 --- a/src/drivers/intel/fsp1_1/Kconfig +++ b/src/drivers/intel/fsp1_1/Kconfig @@ -34,13 +34,13 @@ config HAVE_FSP_BIN config CPU_MICROCODE_CBFS_LEN hex "Microcode update region length in bytes" - default 0 + default 0x0 help The length in bytes of the microcode update region. config CPU_MICROCODE_CBFS_LOC hex "Microcode update base address in CBFS" - default 0 + default 0x0 help The location (base address) in CBFS that contains the microcode update binary. diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index dafdff12de..518e7caada 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -69,7 +69,7 @@ config UART_USE_REFCLK_AS_INPUT_CLOCK config UART_PCI_ADDR hex "UART's PCI bus, device, function address" - default 0 + default 0x0 help Specify zero if the UART is connected to another bus type. For PCI based UARTs, build the value as: diff --git a/src/mainboard/google/daisy/Kconfig b/src/mainboard/google/daisy/Kconfig index cef3f6125e..29d6690c72 100644 --- a/src/mainboard/google/daisy/Kconfig +++ b/src/mainboard/google/daisy/Kconfig @@ -49,7 +49,7 @@ config DRAM_SIZE_MB config EC_GOOGLE_CHROMEEC_I2C_BUS hex - default 4 + default 0x4 config UART_FOR_CONSOLE int diff --git a/src/mainboard/google/smaug/Kconfig b/src/mainboard/google/smaug/Kconfig index 15ff2b3fc4..665545325b 100644 --- a/src/mainboard/google/smaug/Kconfig +++ b/src/mainboard/google/smaug/Kconfig @@ -85,7 +85,7 @@ config DRIVER_TPM_I2C_ADDR config EC_GOOGLE_CHROMEEC_I2C_BUS hex - default 1 + default 0x1 config EC_GOOGLE_CHROMEEC_BOARDNAME string |