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authorStephen Douthit <stephend@silicom-usa.com>2019-08-02 17:05:03 -0400
committerPatrick Georgi <pgeorgi@google.com>2020-03-10 20:31:33 +0000
commit2c18ba5bd7e279cd9e55fcfc93c180d52296a374 (patch)
tree2d7292616259f08ed4316d714934c488a13066a2
parent54e9894353ec2c6e635bead94a94953db069d49d (diff)
soc/intel/dnv: Don't clobber SATA_MAP while trying to set mode
SATA Mode Select is bit 16 of the SATA General Configuration register. This code currently incorrectly pokes at the Port Clock Disable bits in the Port Mapping Register, and without clock the affected ports can't link. Change-Id: I37104f520a869bd45a32cfd271d0b893aec3c8ed Signed-off-by: Stephen Douthit <stephend@silicom-usa.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Vanessa Eusebio <vanessa.f.eusebio@intel.com> Reviewed-by: David Guckian Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/soc/intel/denverton_ns/include/soc/sata.h7
-rw-r--r--src/soc/intel/denverton_ns/sata.c8
2 files changed, 6 insertions, 9 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/sata.h b/src/soc/intel/denverton_ns/include/soc/sata.h
index afa39b5d65..f38b539353 100644
--- a/src/soc/intel/denverton_ns/include/soc/sata.h
+++ b/src/soc/intel/denverton_ns/include/soc/sata.h
@@ -23,9 +23,8 @@
#define PCH_SATA0_DEV PCI_DEV(0, SATA_DEV, SATA_FUNC)
#define PCH_SATA1_DEV PCI_DEV(0, SATA2_DEV, SATA2_FUNC)
-#define SATA_MAP 0x90
-#define SATA_MAP_AHCI (0 << 6)
-#define SATA_MAP_RAID (1 << 6)
-#define SATA_PSC 0x92
+#define SATAGC 0x9c
+#define SATAGC_AHCI (0 << 16)
+#define SATAGC_RAID (1 << 16)
#endif //_DENVERTON_NS_SATA_H
diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c
index d53d5535f0..891d95f934 100644
--- a/src/soc/intel/denverton_ns/sata.c
+++ b/src/soc/intel/denverton_ns/sata.c
@@ -31,7 +31,6 @@
static void sata_init(struct device *dev)
{
u32 reg32;
- u16 reg16;
u32 abar;
printk(BIOS_DEBUG, "SATA: Initializing...\n");
@@ -46,10 +45,9 @@ static void sata_init(struct device *dev)
printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n");
/* Set the controller mode */
- reg16 = pci_read_config16(dev, SATA_MAP);
- reg16 &= ~(3 << 6);
- reg16 |= SATA_MAP_AHCI;
- pci_write_config16(dev, SATA_MAP, reg16);
+ reg32 = pci_read_config32(dev, SATAGC);
+ reg32 &= ~SATAGC_AHCI;
+ pci_write_config32(dev, SATAGC, reg32);
/* Initialize AHCI memory-mapped space */
abar = pci_read_config32(dev, PCI_BASE_ADDRESS_5);