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authorElyes Haouas <ehaouas@noos.fr>2023-01-12 06:21:42 +0100
committerElyes Haouas <ehaouas@noos.fr>2023-01-17 04:23:49 +0000
commit24769421cd1df4f58a8addce16ff9c46080ba1ba (patch)
treef88a0af9a0ee4b367f4891bf34ce3f1a8b25ab0c
parent4d661eebe95b06acae7d99777ed36ba56a560112 (diff)
treewide: Fix old-style declarations
Replace old style declaration "const static" with "static const". This to enable "Wold-style-declaration" command option. Change-Id: I757632befed1854f422daaf4dfea58281b16e2f5 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71841 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
-rw-r--r--src/drivers/mrc_cache/mrc_cache.c2
-rw-r--r--src/mainboard/google/drallion/variants/drallion/include/variant/variant.h2
-rw-r--r--src/mainboard/sifive/hifive-unleashed/media.c2
-rw-r--r--src/soc/amd/cezanne/aoac.c2
-rw-r--r--src/soc/amd/cezanne/fch.c2
-rw-r--r--src/soc/amd/glinda/aoac.c2
-rw-r--r--src/soc/amd/glinda/fch.c2
-rw-r--r--src/soc/amd/mendocino/aoac.c2
-rw-r--r--src/soc/amd/mendocino/fch.c2
-rw-r--r--src/soc/amd/phoenix/aoac.c2
-rw-r--r--src/soc/amd/phoenix/fch.c2
-rw-r--r--src/soc/amd/picasso/aoac.c2
-rw-r--r--src/soc/amd/picasso/fch.c2
-rw-r--r--src/soc/samsung/exynos5250/alternate_cbfs.c2
-rw-r--r--src/vendorcode/amd/pi/Lib/amdlib.c12
15 files changed, 20 insertions, 20 deletions
diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c
index 484b414dfa..bb560c89bd 100644
--- a/src/drivers/mrc_cache/mrc_cache.c
+++ b/src/drivers/mrc_cache/mrc_cache.c
@@ -25,7 +25,7 @@
/* Signature "MRCD" was used for older header format before CB:67670. */
#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('d'<<24))
-const static uint32_t mrc_invalid_sig = ~MRC_DATA_SIGNATURE;
+static const uint32_t mrc_invalid_sig = ~MRC_DATA_SIGNATURE;
struct mrc_metadata {
uint32_t signature;
diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/variant.h b/src/mainboard/google/drallion/variants/drallion/include/variant/variant.h
index c61a06319a..8d641aff68 100644
--- a/src/mainboard/google/drallion/variants/drallion/include/variant/variant.h
+++ b/src/mainboard/google/drallion/variants/drallion/include/variant/variant.h
@@ -12,7 +12,7 @@ typedef struct {
const char *name;
} sku_info;
-const static sku_info skus[] = {
+static const sku_info skus[] = {
// Drallion 360
{ .id = 1, .name = "sku1" },
// Drallion
diff --git a/src/mainboard/sifive/hifive-unleashed/media.c b/src/mainboard/sifive/hifive-unleashed/media.c
index f3dcf7f621..a225dda9e9 100644
--- a/src/mainboard/sifive/hifive-unleashed/media.c
+++ b/src/mainboard/sifive/hifive-unleashed/media.c
@@ -56,7 +56,7 @@ const struct region_device *boot_device_ro(void)
return NULL;
}
-const static struct fu540_spi_mmap_config spi_mmap_config = {
+static const struct fu540_spi_mmap_config spi_mmap_config = {
.cmd_en = 1,
.addr_len = 4,
.pad_cnt = 6,
diff --git a/src/soc/amd/cezanne/aoac.c b/src/soc/amd/cezanne/aoac.c
index c313a55b5f..14758e0da4 100644
--- a/src/soc/amd/cezanne/aoac.c
+++ b/src/soc/amd/cezanne/aoac.c
@@ -23,7 +23,7 @@
*
* TODO: Find out which I2C controllers we really need to enable here.
*/
-const static unsigned int aoac_devs[] = {
+static const unsigned int aoac_devs[] = {
FCH_AOAC_DEV_AMBA,
FCH_AOAC_DEV_I2C0,
FCH_AOAC_DEV_I2C1,
diff --git a/src/soc/amd/cezanne/fch.c b/src/soc/amd/cezanne/fch.c
index 1ceb8bc7b9..0936c5e255 100644
--- a/src/soc/amd/cezanne/fch.c
+++ b/src/soc/amd/cezanne/fch.c
@@ -29,7 +29,7 @@
* amd_pci_int_defs.h, just add the pair at the end of this table.
* Order is not important.
*/
-const static struct irq_idx_name irq_association[] = {
+static const struct irq_idx_name irq_association[] = {
{ PIRQ_A, "INTA#" },
{ PIRQ_B, "INTB#" },
{ PIRQ_C, "INTC#" },
diff --git a/src/soc/amd/glinda/aoac.c b/src/soc/amd/glinda/aoac.c
index 9cb9c1a0e2..ab3ec59c1e 100644
--- a/src/soc/amd/glinda/aoac.c
+++ b/src/soc/amd/glinda/aoac.c
@@ -28,7 +28,7 @@
*
* TODO: Find out which I2C controllers we really need to enable here.
*/
-const static unsigned int aoac_devs[] = {
+static const unsigned int aoac_devs[] = {
FCH_AOAC_DEV_AMBA,
FCH_AOAC_DEV_I2C0,
FCH_AOAC_DEV_I2C1,
diff --git a/src/soc/amd/glinda/fch.c b/src/soc/amd/glinda/fch.c
index ea196c0af1..af5f0ecf28 100644
--- a/src/soc/amd/glinda/fch.c
+++ b/src/soc/amd/glinda/fch.c
@@ -25,7 +25,7 @@
* amd_pci_int_defs.h, just add the pair at the end of this table.
* Order is not important.
*/
-const static struct irq_idx_name irq_association[] = {
+static const struct irq_idx_name irq_association[] = {
{ PIRQ_A, "INTA#" },
{ PIRQ_B, "INTB#" },
{ PIRQ_C, "INTC#" },
diff --git a/src/soc/amd/mendocino/aoac.c b/src/soc/amd/mendocino/aoac.c
index ab52544189..d63ca62587 100644
--- a/src/soc/amd/mendocino/aoac.c
+++ b/src/soc/amd/mendocino/aoac.c
@@ -26,7 +26,7 @@
*
* TODO: Find out which I2C controllers we really need to enable here.
*/
-const static unsigned int aoac_devs[] = {
+static const unsigned int aoac_devs[] = {
FCH_AOAC_DEV_AMBA,
FCH_AOAC_DEV_I2C0,
FCH_AOAC_DEV_I2C1,
diff --git a/src/soc/amd/mendocino/fch.c b/src/soc/amd/mendocino/fch.c
index 4427ab6fa3..d7c488bf67 100644
--- a/src/soc/amd/mendocino/fch.c
+++ b/src/soc/amd/mendocino/fch.c
@@ -24,7 +24,7 @@
* amd_pci_int_defs.h, just add the pair at the end of this table.
* Order is not important.
*/
-const static struct irq_idx_name irq_association[] = {
+static const struct irq_idx_name irq_association[] = {
{ PIRQ_A, "INTA#" },
{ PIRQ_B, "INTB#" },
{ PIRQ_C, "INTC#" },
diff --git a/src/soc/amd/phoenix/aoac.c b/src/soc/amd/phoenix/aoac.c
index ab52544189..d63ca62587 100644
--- a/src/soc/amd/phoenix/aoac.c
+++ b/src/soc/amd/phoenix/aoac.c
@@ -26,7 +26,7 @@
*
* TODO: Find out which I2C controllers we really need to enable here.
*/
-const static unsigned int aoac_devs[] = {
+static const unsigned int aoac_devs[] = {
FCH_AOAC_DEV_AMBA,
FCH_AOAC_DEV_I2C0,
FCH_AOAC_DEV_I2C1,
diff --git a/src/soc/amd/phoenix/fch.c b/src/soc/amd/phoenix/fch.c
index 7e265338df..91df79e35a 100644
--- a/src/soc/amd/phoenix/fch.c
+++ b/src/soc/amd/phoenix/fch.c
@@ -24,7 +24,7 @@
* amd_pci_int_defs.h, just add the pair at the end of this table.
* Order is not important.
*/
-const static struct irq_idx_name irq_association[] = {
+static const struct irq_idx_name irq_association[] = {
{ PIRQ_A, "INTA#" },
{ PIRQ_B, "INTB#" },
{ PIRQ_C, "INTC#" },
diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c
index 13d6be4976..a191032c22 100644
--- a/src/soc/amd/picasso/aoac.c
+++ b/src/soc/amd/picasso/aoac.c
@@ -23,7 +23,7 @@
* waiting for each device to become available, a single delay will be
* executed. The console UART is handled separately from this table.
*/
-const static unsigned int aoac_devs[] = {
+static const unsigned int aoac_devs[] = {
FCH_AOAC_DEV_AMBA,
FCH_AOAC_DEV_I2C2,
FCH_AOAC_DEV_I2C3,
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index e364a48419..a1eef6f534 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -31,7 +31,7 @@
* amd_pci_int_defs.h, just add the pair at the end of this table.
* Order is not important.
*/
-const static struct irq_idx_name irq_association[] = {
+static const struct irq_idx_name irq_association[] = {
{ PIRQ_A, "INTA#" },
{ PIRQ_B, "INTB#" },
{ PIRQ_C, "INTC#" },
diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.c b/src/soc/samsung/exynos5250/alternate_cbfs.c
index a540c3cadf..4da2333edc 100644
--- a/src/soc/samsung/exynos5250/alternate_cbfs.c
+++ b/src/soc/samsung/exynos5250/alternate_cbfs.c
@@ -92,7 +92,7 @@ static int sdmmc_cbfs_open(void)
return 0;
}
-const static struct mem_region_device alternate_rdev =
+static const struct mem_region_device alternate_rdev =
MEM_REGION_DEV_RO_INIT(_cbfs_cache, REGION_SIZE(cbfs_cache));
const struct region_device *boot_device_ro(void)
diff --git a/src/vendorcode/amd/pi/Lib/amdlib.c b/src/vendorcode/amd/pi/Lib/amdlib.c
index a5f6898c3f..cc742301d6 100644
--- a/src/vendorcode/amd/pi/Lib/amdlib.c
+++ b/src/vendorcode/amd/pi/Lib/amdlib.c
@@ -58,16 +58,16 @@ RDATA_GROUP (G1_PEICC)
#define FILECODE LIB_AMDLIB_FILECODE
-BOOLEAN
STATIC
+BOOLEAN
GetPciMmioAddress (
OUT UINT64 *MmioAddress,
OUT UINT32 *MmioSize,
IN AMD_CONFIG_PARAMS *StdHeader
);
-VOID
STATIC
+VOID
LibAmdGetDataFromPtr (
IN ACCESS_WIDTH AccessWidth,
IN CONST VOID *Data,
@@ -150,8 +150,8 @@ WriteIo32 (
__outdword (Address, Data);
}
-AMDLIB_OPTIMIZE
STATIC
+AMDLIB_OPTIMIZE
UINT64 SetFsBase (
UINT64 address
)
@@ -163,8 +163,8 @@ UINT64 SetFsBase (
return hwcr;
}
-AMDLIB_OPTIMIZE
STATIC
+AMDLIB_OPTIMIZE
VOID
RestoreHwcr (
UINT64
@@ -961,8 +961,8 @@ LibAmdPciPoll (
*
* @retval TRUE MmioAddress/MmioSize are valid
*/
-BOOLEAN
STATIC
+BOOLEAN
GetPciMmioAddress (
OUT UINT64 *MmioAddress,
OUT UINT32 *MmioSize,
@@ -1300,8 +1300,8 @@ LibAmdGetPackageType (
* @param[out] TempDataMask typecast data
*/
-VOID
STATIC
+VOID
LibAmdGetDataFromPtr (
IN ACCESS_WIDTH AccessWidth,
IN CONST VOID *Data,