diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-07-10 22:14:32 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-07-12 02:04:45 +0000 |
| commit | 0fb2e664ce4c49193f08bc0700c859ff78fdc744 (patch) | |
| tree | 5975df787a7c562f4cdc4bb09f1ba7086f8d5c97 | |
| parent | 90753398b6e394efedae423004648d5f7c303fd4 (diff) | |
cpu/intel/microcode: Drop unnecessary alignment for split microcode
This patch drops the unnecessary alignment of 64 bytes that was
introduced when implementing the split Intel microcode packing logic
into CBFS.
- The 16-byte alignment that is already used for Intel microcode is
sufficient.
- Removes unnecessary alignment check of 64 bytes against an AMD
platform specific config.
TEST=Able to build and boot google/rex without any functional
impact.
Change-Id: Icc44e9511e321592de7ab8d1346103d0a9951c9b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76397
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/cpu/intel/microcode/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc index 4ea8227e13..a2b0a7b190 100644 --- a/src/cpu/intel/microcode/Makefile.inc +++ b/src/cpu/intel/microcode/Makefile.inc @@ -19,7 +19,7 @@ $(foreach params,$(microcode-params), \ $(eval cbfs-files-y += $(params)) \ $(eval $(params)-file := $(microcode-params-dir)/$(params)) \ $(eval $(params)-type := microcode) \ - $(eval $(params)-align := $(if $(filter y,$(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA)),64,16)) \ + $(eval $(params)-align := 16) \ ) endif |