diff options
| author | Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> | 2021-02-05 10:42:54 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-10 07:25:33 +0000 |
| commit | 076d9b9778cf756ef68be7c3977c44ce2af7cc98 (patch) | |
| tree | 6cd5861b96dd5fdcf5ebbf4b87d48610c307b3d7 | |
| parent | 448ecc0e0660f111b3932368a950f18dae01f578 (diff) | |
mb/google/volteer/var/voxel: Add settings for noise mitgation
Enable acoustic noise mitgation for volteer platforms.
BUG=b:179328166
BRANCH=none
TEST= Measure the change in noise level by changing the values
in devicetree.
Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I279a85c7741094bb7ddf0c1fde74b31189b12171
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
| -rw-r--r-- | src/mainboard/google/volteer/variants/voxel/overridetree.cb | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index 879086fb75..ed90069ab4 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -19,6 +19,17 @@ chip soc/intel/tigerlake # Disable SRCCLKREQ1# register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED" + # Acoustic settings + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" + register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" + register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" + register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" + register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" + register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" + register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" + device domain 0 on device ref dptf on chip drivers/intel/dptf |