blob: 045dd70679ae53451af3029fab5f3a6cf4ac15c4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 Advanced Micro Devices, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config SOUTHBRIDGE_AMD_CIMX_SB700
bool
select IOAPIC
select HAVE_USBDEBUG_OPTIONS
select AMD_SB_CIMX
select HAVE_HARD_RESET
if SOUTHBRIDGE_AMD_CIMX_SB700
config SATA_CONTROLLER_MODE
hex
default 0x0
help
0x0 = Native IDE mode.
0x1 = RAID mode.
0x2 = AHCI mode.
0x3 = Legacy IDE mode.
0x4 = IDE->AHCI mode.
0x5 = AHCI mode as 7804 ID (AMD driver).
0x6 = IDE->AHCI mode as 7804 ID (AMD driver).
config PCIB_ENABLE
bool
default n
help
n = Disable PCI Bridge Device 14 Function 4.
y = Enable PCI Bridge Device 14 Function 4.
config ACPI_SCI_IRQ
hex
default 0x9
help
Set SCI IRQ to 9.
config EHCI_BAR
hex
default 0xfef00000
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/amd/cimx/sb700/bootblock.c"
config REDIRECT_SBCIMX_TRACE_TO_SERIAL
bool "Redirect AMD Southbridge CIMX Trace to serial console"
default n
help
This Option allows you to redirect the AMD Southbridge CIMX Trace
debug information to the serial console.
Warning: Only enable this option when debuging or tracing AMD CIMX code.
endif #SOUTHBRIDGE_AMD_CIMX_SB700
|
