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if BOARD_SUPERMICRO_H8SCM_FAM10
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_AMD_SOCKET_C32
select DIMM_DDR3
select DIMM_REGISTERED
select NORTHBRIDGE_AMD_AMDFAM10
select SOUTHBRIDGE_AMD_SR5650
select SOUTHBRIDGE_AMD_SP5100
select SUPERIO_WINBOND_W83627HF
select SUPERIO_NUVOTON_WPCM450
select HAVE_BUS_CONFIG
select HAVE_OPTION_TABLE
select GENERATE_PIRQ_TABLE
select GENERATE_MP_TABLE
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select LIFT_BSP_APIC_ID
select SERIAL_CPU_INIT
select AMDMCT
select GENERATE_ACPI_TABLES
select BOARD_ROMSIZE_KB_2048
select RAMINIT_SYSINFO
select ENABLE_APIC_EXT_ID
config MAINBOARD_DIR
string
default supermicro/h8scm_fam10
config APIC_ID_OFFSET
hex
default 0x0
config MAINBOARD_PART_NUMBER
string
default "H8SCM (Fam10)"
config MAX_CPUS
int
default 16
config MAX_PHYSICAL_CPUS
int
default 1
config MEM_TRAIN_SEQ
int
default 2
config SB_HT_CHAIN_ON_BUS0
int
default 1
config HT_CHAIN_END_UNITID_BASE
hex
default 0x1
config HT_CHAIN_UNITID_BASE
hex
default 0x0
config IRQ_SLOT_COUNT
int
default 11
config AMD_UCODE_PATCH_FILE
string
default "mc_patch_010000c4.h"
config RAMTOP
hex
default 0x2000000
config HEAP_SIZE
hex
default 0xc0000
config ACPI_SSDTX_NUM
int
default 0
config RAMBASE
hex
default 0x200000
endif # BOARD_AMD_H8SCM_FAM10
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