blob: f7571cc30968f98403faa7a6893052407cf5705f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 Advanced Micro Devices, Inc.
## Copyright (C) 2010 Siemens AG, Inc.
## (Written by Josef Kellermann <joseph.kellermann@heitec.de> for Siemens AG, Inc.)
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
##
##
entries
# =======================================================
# =======================================================
# ========================================================
0 384 r 0 reserved_memory
# ========================================================
#384 1 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
#386 1 r 1 unused
387 1 e 16 cmos_defaults_loaded
388 4 h 0 reboot_counter
#392 3 r 0 unused
#395 1 r 1 unused
#396 1 r 1 unused
#397 2 r 8 unused
399 1 e 2 multi_core
#400 8 r 18 reserved
408 4 e 6 debug_level
412 1 e 1 power_on_after_fail
#413 1 r 1 unused
414 1 e 17 sata_mode
415 1 e 1 nmi
416 1 e 1 cpu_fan_control
417 1 e 1 chassis_fan_control
418 1 e 13 cpu_fan_polarity
419 1 e 13 chassis_fan_polarity
420 4 e 14 cpu_t_min
424 4 e 14 cpu_t_max
428 4 e 15 cpu_dutycycle_min
432 4 e 15 cpu_dutycycle_max
436 4 e 14 chassis_t_min
440 4 e 14 chassis_t_max
444 4 e 15 chassis_dutycycle_min
448 4 e 15 chassis_dutycycle_max
#452 4 r 9 unused
456 4 e 10 boot_delay
460 4 e 11 lcd_panel_id
#===========================================================
464 512 s 0 boot_devices
976 8 h 0 boot_default
984 16 h 0 check_sum
# Reserve the extended AMD configuration registers
1000 24 r 0 amd_reserved
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
6 4 Warning
6 5 Notice
6 6 Info
6 7 Debug
6 8 Spew
8 0 DDR400
8 1 DDR333
8 2 DDR266
8 3 DDR200
# boot delay
10 0 off
10 1 1s
10 2 2s
10 3 3s
10 4 4s
10 5 5s
10 6 6s
10 7 7s
10 8 8s
10 9 9s
10 10 10s
# LCD Panel ID
11 0 no_panel
11 1 1024x768_65MHz_Dual
11 2 1920x1200_162MHz
11 3 1600x1200_162MHz
11 4 1024x768_65MHz
11 5 1400x1050_108MHz
11 6 1680x1050_119MHz
11 7 2048x1536_164MHz
11 8 1280x1024_108MHz
11 9 1366x768_86MHz_chimei_V32B1L01
# TV Standard
#12 0 NTSC
#12 1 PAL
#12 2 PALM
#12 3 PAL60
#12 4 NTSCJ
#12 5 PALCN
#12 6 PALN
#12 9 SCART-RGB
#12 15 no_tv
# CPU/Chassis FAN Control: polarity
13 0 Active_high
13 1 Active_low
# Temperature °C
14 0 30
14 1 35
14 2 40
14 3 45
14 4 50
14 5 55
14 6 60
14 7 65
14 8 70
14 9 75
14 10 80
14 11 85
14 12 90
14 13 95
14 14 100
# Dutycycle %
15 0 25%
15 1 30%
15 2 35%
15 3 40%
15 4 45%
15 5 50%
15 6 55%
15 7 60%
15 8 65%
15 9 70%
15 10 75%
15 11 80%
15 12 85%
15 13 90%
15 14 95%
15 15 100%
# cmos_defaults_loaded
16 0 No
16 1 Yes
# sata_mode
17 0 AHCI
17 1 IDE
# reserved
18 32 2000
# ==============================
checksums
checksum 392 983 984
|