blob: f546d456160a7571afa131d3df938c534f10d080 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2008 coresystems GmbH
## Copyright (C) 2014 Vladimir Serbinenko
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc.
##
# -----------------------------------------------------------------
entries
# -----------------------------------------------------------------
# Status Register A
# -----------------------------------------------------------------
# Status Register B
# -----------------------------------------------------------------
# Status Register C
#96 4 r 0 status_c_rsvd
#100 1 r 0 uf_flag
#101 1 r 0 af_flag
#102 1 r 0 pf_flag
#103 1 r 0 irqf_flag
# -----------------------------------------------------------------
# Status Register D
#104 7 r 0 status_d_rsvd
#111 1 r 0 valid_cmos_ram
# -----------------------------------------------------------------
# Diagnostic Status Register
#112 8 r 0 diag_rsvd1
# -----------------------------------------------------------------
0 120 r 0 reserved_memory
#120 264 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
385 1 e 4 last_boot
388 4 r 0 reboot_bits
#390 2 r 0 unused?
# -----------------------------------------------------------------
# coreboot config options: console
392 3 e 5 baud_rate
395 4 e 6 debug_level
#399 1 r 0 unused
400 8 h 0 volume
# coreboot config options: southbridge
408 1 e 1 nmi
409 2 e 7 power_on_after_fail
# coreboot config options: EC
411 1 e 8 first_battery
412 1 e 1 bluetooth
413 1 e 1 wwan
414 1 e 1 touchpad
415 1 e 1 wlan
416 1 e 1 trackpoint
417 1 e 1 fn_ctrl_swap
418 1 e 1 sticky_fn
#419 2 r 0 unused
421 1 e 9 sata_mode
422 2 e 10 backlight
# coreboot config options: cpu
424 1 e 2 hyper_threading
#425 7 r 0 unused
# coreboot config options: northbridge
432 3 e 11 gfx_uma_size
#435 549 r 0 unused
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
960 16 r 0 mrc_scrambler_seed_chk
# coreboot config options: check sums
984 16 h 0 check_sum
# -----------------------------------------------------------------
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
5 0 115200
5 1 57600
5 2 38400
5 3 19200
5 4 9600
5 5 4800
5 6 2400
5 7 1200
6 1 Emergency
6 2 Alert
6 3 Critical
6 4 Error
6 5 Warning
6 6 Notice
6 7 Info
6 8 Debug
6 9 Spew
7 0 Disable
7 1 Enable
7 2 Keep
8 0 Secondary
8 1 Primary
9 0 AHCI
9 1 Compatible
10 0 Both
10 1 Keyboard only
10 2 Thinklight only
10 3 None
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# -----------------------------------------------------------------
checksums
checksum 392 415 984
|
