blob: 3199ed5314e3cd04f5935f8dbce572fb9c504532 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* mainboard configuration */
#include <mainboard/google/rambi/ec.h>
#include <mainboard/google/rambi/onboard.h>
#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard
// Override default IRQ settings
#define SIO_EC_PS2K_IRQ Interrupt(ResourceConsumer, Edge, ActiveLow) {BOARD_I8042_IRQ}
/* ACPI code for EC SuperIO functions */
#include <ec/google/chromeec/acpi/superio.asl>
|
