blob: 1c5e401ffa4e60bff247ce29d90eaaeba4a9505a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
|
#
# This file is part of the coreboot project.
#
# Copyright (C) 2011 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
if BOARD_AMD_SOUTHSTATION
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_AMD_AGESA_FAMILY14
select NORTHBRIDGE_AMD_AGESA_FAMILY14_ROOT_COMPLEX
select NORTHBRIDGE_AMD_AGESA_FAMILY14
select SOUTHBRIDGE_AMD_CIMX_SB800
select SUPERIO_FINTEK_F81865F
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select LIFT_BSP_APIC_ID
select SERIAL_CPU_INIT
select AMDMCT
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_4096
select GFXUMA
select UDELAY_LAPIC
config MAINBOARD_DIR
string
default amd/south_station
config APIC_ID_OFFSET
hex
default 0x0
config MAINBOARD_PART_NUMBER
string
default "Southstation"
config HW_MEM_HOLE_SIZEK
hex
default 0x200000
config MAX_CPUS
int
default 4
config MAX_PHYSICAL_CPUS
int
default 1
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
config MEM_TRAIN_SEQ
int
default 2
config IRQ_SLOT_COUNT
int
default 11
config RAMTOP
hex
default 0x1000000
config HEAP_SIZE
hex
default 0xc0000
config RAMBASE
hex
default 0x200000
config SIO_PORT
hex
default 0x4e
config ONBOARD_VGA_IS_PRIMARY
bool
default y
config VGA_BIOS
bool
default n
config VGA_BIOS_FILE
string
default "site-local/vgabios.bin"
config VGA_BIOS_ID
string
default "1002,9806"
config DRIVERS_PS2_KEYBOARD
bool
default n
config WARNINGS_ARE_ERRORS
bool
default n
endif # BOARD_AMD_SOUTHSTATION
|
