blob: 9539fa7b101a44a62eacba5b3f6029085c9c65b7 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
|
config BOARD_AMD_SERENGETI_CHEETAH
bool "Serengeti Cheetah"
select ARCH_X86
select CPU_AMD_K8
select CPU_AMD_SOCKET_F
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_AMD_AMD8111
select SOUTHBRIDGE_AMD_AMD8131
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
help
AMD Serengeti Cheetah mainboard.
config MAINBOARD_DIR
string
default amd/serengeti_cheetah
depends on BOARD_AMD_SERENGETI_CHEETAH
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_AMD_SERENGETI_CHEETAH
config DCACHE_RAM_SIZE
hex
default 0x08000
depends on BOARD_AMD_SERENGETI_CHEETAH
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
depends on BOARD_AMD_SERENGETI_CHEETAH
config APIC_ID_OFFSET
hex
default 0x8
depends on BOARD_AMD_SERENGETI_CHEETAH
config HAVE_HARD_RESET
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config IOAPIC
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config LB_CKS_RANGE_END
int
default 122
depends on BOARD_AMD_SERENGETI_CHEETAH
config LB_CKS_LOC
int
default 123
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAINBOARD_PART_NUMBER
string
default "Serengeti-Cheetah"
depends on BOARD_AMD_SERENGETI_CHEETAH
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
depends on BOARD_AMD_SERENGETI_CHEETAH
config MEM_TRAIN_SEQ
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config HAVE_FAILOVER_BOOT
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config USE_FAILOVER_IMAGE
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAX_CPUS
int
default 8
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAX_PHYSICAL_CPUS
int
default 4
depends on BOARD_AMD_SERENGETI_CHEETAH
config MEM_TRAIN_SEQ
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config AP_CODE_IN_CAR
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config SB_HT_CHAIN_ON_BUS0
int
default 2
depends on BOARD_AMD_SERENGETI_CHEETAH
config HT_CHAIN_END_UNITID_BASE
hex
default 0x6
depends on BOARD_AMD_SERENGETI_CHEETAH
config HT_CHAIN_UNITID_BASE
hex
default 0xa
depends on BOARD_AMD_SERENGETI_CHEETAH
config USE_INIT
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config SERIAL_CPU_INIT
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config AP_CODE_IN_CAR
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config WAIT_BEFORE_CPUS_INIT
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config CONSOLE_VGA
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config PCI_ROM_RUN
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
|
