blob: eb60ad180b55b148111b69dc5dc7b9b13b0a6b32 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
|
config CPU_TI_AM335X
select ARCH_BOOTBLOCK_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_RAMSTAGE_ARMV7
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
select CPU_HAS_BOOTBLOCK_INIT
select DYNAMIC_CBMEM
bool
default n
if CPU_TI_AM335X
config BOOTBLOCK_BASE
hex
default 0x402f0400
config CBFS_ROM_OFFSET
# Calculated by BL1 + max bootblock size.
default 0x4c00
# We need to leave a gap between the bootblock and the ROM stage so that when
# it is "loaded" to a slightly different place in on chip memory, it doesn't
# clobber the metadata needed to actually enter it.
config ROMSTAGE_BASE
hex
default 0x402f5400
# Stack may reside in either IRAM or DRAM. We will define it to live
# at the top of IRAM for now.
#
# Stack grows downward, push operation stores register contents in
# consecutive memory locations ending just below SP
config STACK_TOP
hex
default 0x4030ce00
config STACK_BOTTOM
hex
default 0x4030be00
config STACK_SIZE
hex
default 0x1000
## TODO Change this to some better address not overlapping bootblock when
## cbfstool supports creating header in arbitrary location.
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x40
config SYS_SDRAM_BASE
hex
default 0x40000000
endif
|
