/** * @file * * ALIB PSPP Pcie Smu Lib V1 * * * * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: GNB * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ * */ /* ***************************************************************************** * * Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved. * * AMD is granting you permission to use this software (the Materials) * pursuant to the terms and conditions of your Software License Agreement * with AMD. This header does *NOT* give you permission to use the Materials * or any rights under AMD's intellectual property. Your use of any portion * of these Materials shall constitute your acceptance of those terms and * conditions. If you do not agree to the terms and conditions of the Software * License Agreement, please do not use any portion of these Materials. * * CONFIDENTIALITY: The Materials and all other information, identified as * confidential and provided to you by AMD shall be kept confidential in * accordance with the terms and conditions of the Software License Agreement. * * LIMITATION OF LIABILITY: THE MATERIALS AND ANY OTHER RELATED INFORMATION * PROVIDED TO YOU BY AMD ARE PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED * WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO WARRANTIES OF * MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY PARTICULAR PURPOSE, * OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. * IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY DAMAGES WHATSOEVER * (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS * INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF AMD'S NEGLIGENCE, * GROSS NEGLIGENCE, THE USE OF OR INABILITY TO USE THE MATERIALS OR ANY OTHER * RELATED INFORMATION PROVIDED TO YOU BY AMD, EVEN IF AMD HAS BEEN ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT THE * EXCLUSION OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, * THE ABOVE LIMITATION MAY NOT APPLY TO YOU. * * AMD does not assume any responsibility for any errors which may appear in * the Materials or any other related information provided to you by AMD, or * result from use of the Materials or any related information. * * You agree that you will not reverse engineer or decompile the Materials. * * NO SUPPORT OBLIGATION: AMD is not obligated to furnish, support, or make any * further information, software, technical information, know-how, or show-how * available to you. Additionally, AMD retains the right to modify the * Materials at any time, without notice, and is not obligated to provide such * modified Materials to you. * * U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with * "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is * subject to the restrictions as set forth in FAR 52.227-14 and * DFAR252.227-7013, et seq., or its successor. Use of the Materials by the * Government constitutes acknowledgement of AMD's proprietary rights in them. * * EXPORT ASSURANCE: You agree and certify that neither the Materials, nor any * direct product thereof will be exported directly or indirectly, into any * country prohibited by the United States Export Administration Act and the * regulations thereunder, without the required authorization from the U.S. * government nor will be used for any purpose prohibited by the same. * *************************************************************************** * */ /*----------------------------------------------------------------------------------------*/ /** * Request VID * * Arg0 - 1 - GEN1 2 - GEN2 * Arg1 - 0 = do not wait intil voltage is set * 1 = wait until voltage is set */ Method (procPcieSetVoltage, 2, Serialized) { Store ("PcieSetVoltage Enter", Debug) // Get real vid by index if (LEqual (Arg0, DEF_LINK_SPEED_GEN1)) { Store (DeRefOf (Index (varSclkVid, varGen1Vid)), local3) } else { Store (DeRefOf (Index (varSclkVid, varGen2Vid)), local3) } // GMMx63C/GMMx640 -- CG_Reg = reg - 0x600 // Store REQ in local2 And (procIndirectRegisterRead (0x0, 0xB8, 0xE000203C), 0x4, Local2) // Store ACK in local1 And (procIndirectRegisterRead (0x0, 0xB8, 0xE0002040), 0x1, Local1) // Compare REQ with ACK while (LNotEqual (ShiftLeft(Local1, 0x2), Local2)) { And (procIndirectRegisterRead (0x0, 0xB8, 0xE0002040), 0x1, Local1) } Store (procIndirectRegisterRead (0x0, 0xB8, 0xE000203C), Local1) //Enable voltage change if (LEqual (Arg0, DEF_LINK_SPEED_GEN1)) { And (Local1, 0xFFFFFFFD, Local1) } else { Or (Local1, 0x2, Local1) } procIndirectRegisterWrite (0x0, 0xB8, 0xE000203C, Local1) //Clear voltage index And (Local1, Not (ShiftLeft (0xFF, 8)), Local1) Store (Concatenate (" Voltage Index:", ToHexString (local3), Local6), Debug) //Set new voltage index Or (Local1, ShiftLeft (local3, 8), Local1) //Togle request And (Not (Local1), 0x4, Local2) Or (And (Local1, Not (0x4)), Local2, Local1) procIndirectRegisterWrite (0x0, 0xB8, 0xE000203C, Local1) if (LNotEqual (Arg1, 0)) { while (LNotEqual (ShiftLeft(Local1, 0x2), Local2)) { And (procIndirectRegisterRead (0x0, 0xB8, 0xE0002040), 0x1, Local1) } } Store ("PcieSetVoltage Exit", Debug) }