/* $NoKeywords:$ */ /** * @file * * Config FCH USB3 controller * * Init USB3 features. * * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: FCH * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ * */ /*;******************************************************************************** ; ; Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved. ; ; AMD is granting you permission to use this software (the Materials) ; pursuant to the terms and conditions of your Software License Agreement ; with AMD. This header does *NOT* give you permission to use the Materials ; or any rights under AMD's intellectual property. Your use of any portion ; of these Materials shall constitute your acceptance of those terms and ; conditions. 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Use of the Materials by the ; Government constitutes acknowledgement of AMD's proprietary rights in them. ; ; EXPORT ASSURANCE: You agree and certify that neither the Materials, nor any ; direct product thereof will be exported directly or indirectly, into any ; country prohibited by the United States Export Administration Act and the ; regulations thereunder, without the required authorization from the U.S. ; government nor will be used for any purpose prohibited by the same. ;*********************************************************************************/ #include "FchPlatform.h" #include "Filecode.h" #define FILECODE PROC_FCH_USB_FAMILY_HUDSON2_HUDSON2XHCILATESERVICE_FILECODE // // Declaration of local functions // /** * FchInitLateUsbXhciProgram - Config USB3 controller before OS * Boot * * * * @param[in] FchDataPtr Fch configuration structure pointer. * */ VOID FchInitLateUsbXhciProgram ( IN VOID *FchDataPtr ) { UINT8 IndexValue; UINT8 Value; FCH_DATA_BLOCK *LocalCfgPtr; AMD_CONFIG_PARAMS *StdHeader; LocalCfgPtr = (FCH_DATA_BLOCK *)FchDataPtr; StdHeader = LocalCfgPtr->StdHeader; if ( LocalCfgPtr->Usb.Xhci1Enable == TRUE ) { ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x10, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_BAR00; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x11, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_BAR01; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x12, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_BAR02; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x13, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_BAR03; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x04, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_04H; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x0C, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_0CH; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI_BUS_DEV_FUN << 16) + 0x3C, AccessWidth8, &Value, StdHeader); IndexValue = XHCI_REGISTER_3CH; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x10, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_BAR00; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x11, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_BAR01; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x12, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_BAR02; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x13, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_BAR03; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x04, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_04H; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x0C, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_0CH; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); ReadPci ((USB_XHCI1_BUS_DEV_FUN << 16) + 0x3C, AccessWidth8, &Value, StdHeader); IndexValue = XHCI1_REGISTER_3CH; WriteBiosram (IndexValue, AccessWidth8, &Value, StdHeader); } //RPR 8.12 xHCI controller PCI configuration space "Read Only" registers write lock enable RwXhciIndReg ( FCH_XHCI_IND_REG04, (UINT32)~BIT8, (UINT32)BIT8, StdHeader); }