/* $NoKeywords:$ */ /** * @file * * Common initialization routines. * * Contains common initialization routines across AGESA entries of phases. * * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: Common * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ * */ /***************************************************************************** * * Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved. * * AMD is granting you permission to use this software (the Materials) * pursuant to the terms and conditions of your Software License Agreement * with AMD. This header does *NOT* give you permission to use the Materials * or any rights under AMD's intellectual property. Your use of any portion * of these Materials shall constitute your acceptance of those terms and * conditions. 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Use of the Materials by the * Government constitutes acknowledgement of AMD's proprietary rights in them. * * EXPORT ASSURANCE: You agree and certify that neither the Materials, nor any * direct product thereof will be exported directly or indirectly, into any * country prohibited by the United States Export Administration Act and the * regulations thereunder, without the required authorization from the U.S. * government nor will be used for any purpose prohibited by the same. ****************************************************************************** */ /*---------------------------------------------------------------------------------------- * M O D U L E S U S E D *---------------------------------------------------------------------------------------- */ #include "AGESA.h" #include "Ids.h" #include "Filecode.h" #include "heapManager.h" #include "CommonInits.h" CODE_GROUP (G1_PEICC) RDATA_GROUP (G1_PEICC) #define FILECODE PROC_COMMON_COMMONINITS_FILECODE /*---------------------------------------------------------------------------------------- * D E F I N I T I O N S A N D M A C R O S *---------------------------------------------------------------------------------------- */ extern BUILD_OPT_CFG UserOptions; /*---------------------------------------------------------------------------------------- * T Y P E D E F S A N D S T R U C T U R E S *---------------------------------------------------------------------------------------- */ /*---------------------------------------------------------------------------------------- * P R O T O T Y P E S O F L O C A L F U N C T I O N S *---------------------------------------------------------------------------------------- */ /*---------------------------------------------------------------------------------------- * E X P O R T E D F U N C T I O N S *---------------------------------------------------------------------------------------- */ /*------------------------------------------------------------------------------------*/ /** * Common routine to initialize PLATFORM_CONFIGURATION. * * @param[in,out] PlatformConfig Platform profile/build option config structure * @param[in,out] StdHeader AMD standard header config param * * @retval AGESA_SUCCESS Always Succeeds. * */ AGESA_STATUS CommonPlatformConfigInit ( IN OUT PLATFORM_CONFIGURATION *PlatformConfig, IN OUT AMD_CONFIG_PARAMS *StdHeader ) { UINTN i; PlatformConfig->PlatformProfile = UserOptions.CfgPerformanceProfile; PlatformConfig->PlatformDeemphasisList = UserOptions.CfgPlatformDeemphasisList; PlatformConfig->CoreLevelingMode = (UINT8) UserOptions.CfgCoreLevelingMode; PlatformConfig->C1eMode = UserOptions.CfgPlatformC1eMode; PlatformConfig->C1ePlatformData = UserOptions.CfgPlatformC1eOpData; PlatformConfig->C1ePlatformData1 = UserOptions.CfgPlatformC1eOpData1; PlatformConfig->C1ePlatformData2 = UserOptions.CfgPlatformC1eOpData2; PlatformConfig->C1ePlatformData3 = UserOptions.CfgPlatformC1eOpData3; PlatformConfig->CStateMode = UserOptions.CfgPlatformCStateMode; PlatformConfig->CStatePlatformData = UserOptions.CfgPlatformCStateOpData; PlatformConfig->CStateIoBaseAddress = UserOptions.CfgPlatformCStateIoBaseAddress; PlatformConfig->CpbMode = UserOptions.CfgPlatformCpbMode; PlatformConfig->UserOptionDmi = UserOptions.OptionDmi; PlatformConfig->UserOptionPState = UserOptions.OptionAcpiPstates; PlatformConfig->UserOptionCrat = UserOptions.OptionCrat; PlatformConfig->UserOptionCdit = UserOptions.OptionCdit; PlatformConfig->UserOptionSrat = UserOptions.OptionSrat; PlatformConfig->UserOptionSlit = UserOptions.OptionSlit; PlatformConfig->UserOptionWhea = UserOptions.OptionWhea; PlatformConfig->LowPowerPstateForProcHot = UserOptions.CfgLowPowerPstateForProcHot; PlatformConfig->PowerCeiling = UserOptions.CfgAmdPstateCapValue; PlatformConfig->ForcePstateIndependent = UserOptions.CfgAcpiPstateIndependent; PlatformConfig->PStatesInHpcMode = UserOptions.OptionPStatesInHpcMode; PlatformConfig->NumberOfIoApics = UserOptions.CfgPlatNumIoApics; for (i = 0; i < MaxVrmType; i++) { PlatformConfig->VrmProperties[i] = UserOptions.CfgPlatVrmCfg[i]; } PlatformConfig->ProcessorScopeInSb = UserOptions.CfgProcessorScopeInSb; PlatformConfig->ProcessorScopeName0 = UserOptions.CfgProcessorScopeName0; PlatformConfig->ProcessorScopeName1 = UserOptions.CfgProcessorScopeName1; PlatformConfig->GnbHdAudio = UserOptions.CfgGnbHdAudio; PlatformConfig->AbmSupport = UserOptions.CfgAbmSupport; PlatformConfig->DynamicRefreshRate = UserOptions.CfgDynamicRefreshRate; PlatformConfig->LcdBackLightControl = UserOptions.CfgLcdBackLightControl; if ((StdHeader->HeapStatus == HEAP_LOCAL_CACHE) || (StdHeader->HeapStatus == HEAP_TEMP_MEM) || (StdHeader->HeapStatus == HEAP_SYSTEM_MEM)) { IDS_OPTION_HOOK (IDS_PLATFORMCFG_OVERRIDE, PlatformConfig, StdHeader); } return AGESA_SUCCESS; }