##
## This file is part of the coreboot project.
##
## Copyright (C) 2008-2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##

config SOUTHBRIDGE_INTEL_I82801GX
	bool
	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
	select SOUTHBRIDGE_INTEL_COMMON
	select IOAPIC
	select HAVE_HARD_RESET
	select HAVE_USBDEBUG
	select USE_WATCHDOG_ON_BOOT
	select HAVE_SMI_HANDLER
	select COMMON_FADT
	select SOUTHBRIDGE_INTEL_COMMON_GPIO
	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
	select SOUTHBRIDGE_INTEL_COMMON_SPI
	select HAVE_INTEL_CHIPSET_LOCKDOWN
	select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ

if SOUTHBRIDGE_INTEL_I82801GX

config EHCI_BAR
	hex
	default 0xfef00000

config BOOTBLOCK_SOUTHBRIDGE_INIT
	string
	default "southbridge/intel/i82801gx/bootblock.c"

config HPET_MIN_TICKS
	hex
	default 0x80

endif