## SPDX-License-Identifier: GPL-2.0-only

config SOC_QC_IPQ40XX
	bool
	default n
	select ARCH_BOOTBLOCK_ARMV7
	select ARCH_VERSTAGE_ARMV7
	select ARCH_ROMSTAGE_ARMV7
	select ARCH_RAMSTAGE_ARMV7
	select HAVE_UART_SPECIAL
	select GENERIC_GPIO_LIB
# clang creates larger binaries that may not fit
	select CLANG_UNSUPPORTED if CHROMEOS

if SOC_QC_IPQ40XX

config MEMLAYOUT_LD_FILE
	string
	default "src/soc/qualcomm/ipq40xx/memlayout.ld"

config GENERIC_UDELAY
	def_bool n

config VBOOT
	select VBOOT_STARTS_IN_BOOTBLOCK
	select VBOOT_SEPARATE_VERSTAGE
	select VBOOT_RETURN_FROM_VERSTAGE
	select VBOOT_VBNV_FLASH

config IPQ_QFN_PART
	bool
	default n
	help
	  Is the SoC a QFN part (as opposed to a BGA part)

config CDT_MBN
	string "CDT binary blob"
	default "cdt-AP.DK01.1-C1.bin"

config DDR_MBN
	string "DDR driver binary blob"
	default "ddr.mbn"

config TZ_MBN
	string "TZ binary blob"
	default "tzbsp_no_xpu.mbn"

config SBL_ELF
	depends on USE_BLOBS
	string "file name of the QCA SBL ELF"
	default "3rdparty/blobs/cpu/qualcomm/ipq40xx/sbl.elf"
	help
	  The path and filename of the binary blob containing
	  ipq40xx early initialization code, as supplied by the
	  vendor.

config SBL_UTIL_PATH
	depends on USE_BLOBS
	string "Path for utils to combine SBL_ELF and bootblock"
	default "util/qualcomm"
	help
	  Path for utils to combine SBL_ELF and bootblock

endif