config SOC_INTEL_COMMON
	bool
	help
	  common code for Intel SOCs

if SOC_INTEL_COMMON

config CACHE_MRC_SETTINGS
	bool "Save cached MRC settings"
	default n

if CACHE_MRC_SETTINGS

config MRC_SETTINGS_CACHE_BASE
	hex
	default 0xfffe0000

config MRC_SETTINGS_CACHE_SIZE
	hex
	default 0x10000

config MRC_SETTINGS_PROTECT
	bool "Enable protection on MRC settings"
	default n

endif # CACHE_MRC_SETTINGS

config DISPLAY_MTRRS
	bool "MTRRs: Display the MTRR settings"
	default n

config DISPLAY_SMM_MEMORY_MAP
	bool "SMM: Display the SMM memory map"
	default n

config SOC_INTEL_COMMON_RESET
	bool
	default n

config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
	bool
	default n

config SOC_SETS_MTRRS
	bool
	default n
	help
	  The SoC needs uses different access methods for reading and writing
	  the MTRRs.  Use SoC specific routines to handle the MTRR access.

config MMA
	bool "enable MMA (Memory Margin Analysis) support"
	default n
	help
	  Set this option to y to enable MMA (Memory Margin Analysis) support

config MMA_BLOBS_PATH
	string "Path to MMA blobs"
	depends on MMA
	default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/mma"

config ADD_VBT_DATA_FILE
	bool "Add a Video Bios Table (VBT) binary to CBFS"
	help
	  Add a VBT file data file to CBFS. The VBT describes the integrated
	  GPU and connections, and is needed by FSP in order to initialize the
	  display.

config VBT_FILE
	string "VBT binary path and filename"
	depends on ADD_VBT_DATA_FILE
	help
	  The path and filename of the VBT binary.

config SOC_INTEL_COMMON_GFX_OPREGION
	bool
	default n

endif # SOC_INTEL_COMMON