/* * This file is part of the coreboot project. * * Copyright 2017 Google Inc. * Copyright 2017 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <intelblocks/spi.h> #include <soc/pci_devs.h> int spi_soc_devfn_to_bus(unsigned int devfn) { switch (devfn) { case PCH_DEVFN_SPI: return 0; case PCH_DEVFN_GSPI0: return 1; case PCH_DEVFN_GSPI1: return 2; case PCH_DEVFN_GSPI2: return 3; } return -1; } int spi_soc_bus_to_devfn(unsigned int bus) { switch (bus) { case 0: return PCH_DEVFN_SPI; case 1: return PCH_DEVFN_GSPI0; case 2: return PCH_DEVFN_GSPI1; case 3: return PCH_DEVFN_GSPI2; } return -1; }